It’s getting harder and harder to verify the correctness of circuits and systems. How to close the verification gap? At #ASPDAC, @BurgholzerLukas and I *Robert Wille *@rbrtwll presented a rather wild (and maybe a bit crazy) new idea: using reversible circuits. #verification #correctness This won’t solve the problem overnight (actually even introduces other challenges), but may open a new perspective. Have a look at https://cda.cit.tum.de/files/eda/2023_aspdac_reversible_computing_for_verification.pdf…