<!channel>: New year, new adventures. This chann...
# vlsi101
t
<!channel>: New year, new adventures. This channel has not been much used in the past year, but I would like to make use of it for putting together documentation for how to manage a complete end-to-end design from concept to layout for both pure analog and mixed-signal designs. There is a wealth of information on the web with instructional videos from university courses and similar content. I expect most of this content to be rather piecemeal, mostly concentrated on the design of single circuits rather than an explanation of a full end-to-end flow. I'd like to create the documentation that links it all together, especially to provide instructions on how to use open source tools (xschem, magic, klayout, netgen, ngspice, xyce, etc.) to complete a working design for a Caravan or (upcoming!) Caravel/Caravan "open frame" chip. I am doing a channel blast so I can get feedback from people, both instructors and students (or "instructees", maybe), on what are the most valuable online resources available for analog and mixed-signal design, so I can get something started. Please let me know what online videos, tutorials, textbooks, or other help you know of that provide a valuable resource for understanding analog and mixed-signal circuit design. Thanks!
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m
This is consistently one of the resources I share: https://www.zerotoasiccourse.com/post/livestream-with-thomas-parry/
I have ideas I'm happy to share
Also @Stefan Schippers is working on a webinar that we hope to release soon
m
Many of us are here to answer questions as well. Definitely would like to promote this channel.
t
The problem with Slack channels is that they aren't properly organized or indexed, so I want to work up such a reference page somewhere where people can know where to find it and it will always be there.
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m
I had started to create one in the topic of #general but decided not to. we should refine a list of 8-12 recommended channels
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there are currently 148 channels!
MPW: #gf180mcu #sky130 #caravel #caravan #openram Conceptual: #vlsi101 #analog-design #digital-design #lvs #chisel Specific tools: #magic #xschem #openroad #klayout #cadence-*
t
I was thinking more along the lines of a fixed set of pages on opencircuitdesign mirrored on efabless, or vice versa. Any discussion of the content would be done on slack channels---preferably this one for basic introductory electronics and others as you have listed above for more advanced topics.
m
oh yeah, i'm just trying to point people to discussion channels
k
We had prepared this last year. You might want to take a look if it helps https://hackathon.fossee.in/esim/results
s
@Matt Venn New year new adventures. I have choosen a slightly simpler analog example to run a video tutorial. In a very few days i will send the recordings.
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e
I’ve enjoyed bminch’s YouTube content. For example I found this helpful

https://youtu.be/8SMBSYiLbHM

r
Love to see more about “open frame” like how to submit a design, what can and cannot be changed/customized in the pad frame.
t
@Robin Tsang: Yes, that will be coming. As soon as we get it defined, work through an example run, and document it. It is very high priority for Efabless, and we want it done before the next open MPW run (which should be in April).
r
Thanks Tim, looking forward to it!
v
@Tim Edwards @Stefan Schippers Are there any resources available that outline the recommended design flow for mixed-signal circuits? Would like to integrate digital block into my custom analog design flow. Any suggestions on how to simulate this using Xschem and Ngspice, and how to integrate the layout in Magic?
s
@vks you can simulate the whole thing at transistor level by providing the spice gate level (synthetized) netlist for the digital block -OR- use @Tim Edwards spi2xspice.py, part of qflow, transforming the gate level netlist into a set of Xspice digital primitives. These primitives are simulated by the Xspice subsystem of ngspice, it is a digital event driven simulation engine (= fast). May be ther are other options using Verilog / Verilog-A, but I have not tried these.
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