Hello, while designing the charge pump of a PLL in Sky 130, I met lot of problems with the consistency of the transistor model; this subject has been discussed here (discontinuous properties with dimensions, etc). But I also noticed a strange relation between gds and L of the transistor. gds (the slope of the characteristics Id(Vds) in the saturation mode) is supposed to decrease with increasing L. This is the case for the pMOS transistor, but not for the nMOS transistor, where gds seems to be close to constant. I join the simulation plots for two transistors, Id(Vds) for different L and fixed W/L to show the problem ; one can see that the slope with nMOS is close to constant for any L, and it seems to be correct for pMOS. The models concerned are _sky130_fd_pr_nfet_01v8_ and _sky130_fd_pr_pfet_01v8_. I join the simulation scripts allowing to get these plots. This is a problem for analog design, for instance, when designing a high gain amplifier or, in my case, a charge pump with the output current with low sensitivity to the output voltage. Is someone have had similar problem ? Thanks for help.

VGS at 1.8 V is too large. Try something below 1 V. If I were you, I would test a current mirror and change VDS at the output. And there are lots of second order effects. rds is not proportional to L for small nodes, even 130 nm. Also, the transistor VT changes considerably with W and L.

@Luis Henrique Rodovalho, thank you very much for your response. I tried with Vgs=1V, but it doesn't change much the issue with gds for nMOS transistor, which keeps the order of magnitude as L increases. I have designed the same circuit with TSMC 180, and the gds trend was as expected for both transistors. I join the curves for Vgs=1V

See this current mirror testbench.

* Current Mirror A testbench

* Include SkyWater sky130 device models
.lib "/usr/share/pdk/sky130A/libs.tech/ngspice/sky130.lib.spice" tt
.param mc_mm_switch=0

* current mirrors subcircuits

.subckt cma0 ii io vss
xi ii ii vss vss sky130_fd_pr__nfet_01v8 ad=4e+11p pd=2.8e+06u as=4e+11p ps=2.8e+06u w=1.0 l=0.15 m=1
xo io ii vss vss sky130_fd_pr__nfet_01v8 ad=4e+11p pd=2.8e+06u as=4e+11p ps=2.8e+06u w=1.0 l=0.15 m=1
.ends 

.subckt cma1 ii io vss
xi ii ii vss vss sky130_fd_pr__nfet_01v8 ad=4e+11p pd=2.8e+06u as=4e+11p ps=2.8e+06u w=2.0 l=0.30 m=1
xo io ii vss vss sky130_fd_pr__nfet_01v8 ad=4e+11p pd=2.8e+06u as=4e+11p ps=2.8e+06u w=2.0 l=0.30 m=1
.ends 

.subckt cma2 ii io vss
xi ii ii vss vss sky130_fd_pr__nfet_01v8 ad=4e+11p pd=2.8e+06u as=4e+11p ps=2.8e+06u w=4.0 l=0.60 m=1
xo io ii vss vss sky130_fd_pr__nfet_01v8 ad=4e+11p pd=2.8e+06u as=4e+11p ps=2.8e+06u w=4.0 l=0.60 m=1
.ends 

* testbench

.param xi = -10u

vss vss 0   0
vo  vo  vss 0

* DUT
x0  ii0 io0 vss cma0
ii0 ii0 vss {xi}
eo0 io0 vss vo vss 1

x1  ii1 io1 vss cma1
ii1 ii1 vss {xi}
eo1 io1 vss vo vss 1

x2  ii2 io2 vss cma2
ii2 ii2 vss {xi}
eo2 io2 vss vo vss 1

.option gmin=1e-15
.control

    dc vo 0 1.8 10m
    let io0 = -i(eo0)    
    let io1 = -i(eo1)    
    let io2 = -i(eo2)    
    
    let ro0 = deriv(vo)/deriv(io0)
    let ro1 = deriv(vo)/deriv(io1)
    let ro2 = deriv(vo)/deriv(io2)

    let ro0N = ro0/ro0
    let ro1N = ro1/ro0
    let ro2N = ro2/ro0
    
    plot io0 io1 io2
    plot ro0 ro1 ro2
    plot ro0N ro1N ro2N
    
.endc

.end