Hello, I am designing this Bandgap topology, but I...
# analog-design
j
Hello, I am designing this Bandgap topology, but I have a problem, although the currents and voltages of the current mirror coincide, and the vref is 1.1v, I have a rather strange curve, since it should look like a parabola, does anyone know what can to be?
h
It looks like you have too much PTAT added to the Vbe. Try to lower the PTAT content by tweaking R1 and/or R2 until you have a the first-order term cancelled, and only 2nd order.
j
but if I reduce the resistances it drops or increases vref, in addition to changing the currents that must work at a certain design specification
This is ctat and ptat
adjust the multiplicity of the transistor, so as not to change my design current too much, and I manipulated the resistors a bit, but I am not convinced that in the end it tries to go up again, should I continue adjusting it?
l
This startup circuit seems strange. Have you tried to run VDD sweep simulation to see the reference voltage variation?
h
Yes, tweak until you kind of an equripple response. Now you optimized for models, usually a re-tuning after measurements is needed to tweak for actual performance. You will be a bit off, not much I guess.
j
Could you explain to me the actual performance? How do I know what I should have done?
This is the variation vref/temp
l
Make the same simulations with three VDD points: 0.9, 1.0 and 1.1 typical VDD. How does its output behave?