Nelson Rodriguez
12/20/2022, 2:22 AMTopic: Rise and fall times swapped in an inverter while doing a sweep of widths.
PDK: Sky130Hello everyone, hope you are well. I'm sweeping widths of transistors that make up an inverter, while I calculate the rise and fall times for each iteration. Ngspice runs and gives me a plot and values for each iteration but the behavior is not what I expect: If Wn increases: • The fall time must be decrease, because NMOS has now more area for the current while the rise time must be increase, because PMOS has now less area. If you check the plots, you could see some exponential behaviour at the beginning and at the end that I still can't explain (fig 1). But if you look at the center of both, there is a "normal" behaviour, where it seems like the rise and fall times swapped, Tr is decreasing while Tf is increasing (fig 2). I don't know if this is due to an error I'm getting in some iterations where apparently the simulation is not executed but despite that, I'm still getting values for the tr and tf (fig 3) @Stefan Schippers may be you have an idea? Thanks in advance. I attach the code.
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* Title
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.title Calculation of tr, tf for the tt corner over a w sweep.
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* Inclusion of library
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.lib /home/nelson/cad/share/pdk/sky130A/libs.tech/ngspice/sky130.lib.spice tt
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* Circuit netlist
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xp vdd in out vdd sky130_fd_pr__pfet_01v8 l=0.15 w=2
xn out in gnd gnd sky130_fd_pr__nfet_01v8 l=0.15 w=1
vin in gnd PULSE(0 1.8 0 1n 1n 5n 14n)
vpwr vdd gnd DC 1.8
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* Control section
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.control
* Voltage values to calculate rise and fall times
let v_steady = 1.8
let per10 = v_steady * 0.1
let per90 = v_steady * 0.9
let per50 = v_steady * 0.5
* These limits are based on the design of a standard cell of 12 tracks.
let wp_max = 1.85
let wn_min = 0.41
let wp_min = 0.42
let wn_max = 1.84
* Initialization of variables and size of iteration.
let delta_w = 0.01
let wp = wp_max
let wn = wn_min
let loop = 0
* These vectors will be used to save the data of each iteration.
let loops = (wp_max-wp_min)/0.01
let wpv = unitvec($&loops)
let wnv = unitvec($&loops)
let trv = unitvec($&loops)
let tfv = unitvec($&loops)
* Start loop
while wp ge wp_min
* Modify widths
echo
echo ********************************** Cycle $&loop **********************************
echo
alter @m.xn.msky130_fd_pr__nfet_01v8[w] = $&wn
alter @m.xp.msky130_fd_pr__pfet_01v8[w] = $&wp
* Run transient analysis
TRAN 1n 30n $ 3 periods
* Find rise and fall times
echo
meas TRAN t_rise TRIG v(out) VAL=per10 RISE=2 TARG v(out) VAL=per90 RISE=2
meas TRAN t_fall TRIG v(out) VAL=per90 FALL=2 TARG v(out) VAL=per10 FALL=2
echo Wn: $&wn
echo Wp: $&wp
echo
* Save widths, t_rise, t_fall in vectors
let wnv[loop] = wn
let wpv[loop] = wp
let trv[loop] = t_rise
let tfv[loop] = t_fall
* Modify widths
let wn = wn + delta_w
let wp = wp - delta_w
* Counter increment
let loop = loop + 1
end
echo
echo ********************************** End of Simulation **********************************
echo
* Export vector data into raw file
write data_tt.raw wnv wpv trv tfv
* Plot both rise and fall times vs. NMOS widths
plot trv vs wnv, tfv vs wnv
.endc
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* End of file
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.end
Chris
12/20/2022, 7:39 PMNelson Rodriguez
12/22/2022, 9:55 PMStefan Schippers
12/22/2022, 9:59 PMalter
instruction, set dimensions of p and n with .param:
.param WP=...
.param WN=...
then use alterparam to change the value (followed by a reset instruction)
The following is a dc simulation of a single nmos where the width is changed on every run.
* ngspice commands
.param W=1
.options savecurrents
.dc v2 0 1.8 0.01
.control
let start_w = 1
let stop_w = 90
let delta_w = 5
let w_act = start_w
while w_act le stop_w
alterparam W = $&w_act
reset
save all
run
remzerovec
write test_sweep_mos_w.raw
let w_act = w_act + delta_w
set appendwrite
end
.endc
Stefan Schippers
12/22/2022, 10:00 PMNelson Rodriguez
12/24/2022, 10:32 PMvin in gnd PULSE(0 1.8 0 1n 1n 5n 14n)
The first two doesn't have meaning (how is it possible that rise and fall times behave the same?
I though the third is the only one that shows the behave expected: As Wn increases Tf decreases, while Tr increases.
But why is happening that with the plot 1,2 and 4? What is the recommended size of the step with respect to the voltage source description?
Two short questions more:
1. Is not possible to create parameters from the interactive mode isn't it? (fig 1)
2. Must the parameters be defined always before control section? (like I did in my code)Nelson Rodriguez
12/24/2022, 10:37 PMStefan Schippers
12/25/2022, 9:59 AMcload out gnd 100f
with zero loading making bigger transistor will increase drain capacitance, so there is no advantage.
With above load capacitance you get this:Stefan Schippers
12/25/2022, 10:12 AMNelson Rodriguez
12/29/2022, 7:24 PMStefan Schippers
12/30/2022, 11:51 AM