I try to characterize nfet_g5v0d10v5 with W/L = 7/...
# sky130
f
I try to characterize nfet_g5v0d10v5 with W/L = 7/8. In the online documentation Vth is presented as 0.811V. I found a threshold voltage about 1.2V. Can be correct?
a
how did you measure it?
Probably incorrect
the threshold is etested afaik
f
I found the line equation of Ids vs Vgs of nmos
The Vth is the intercept of this line with 0 axis.
Correct?
Immagine di iOS.jpg
a
nope. It even says "linear interpolation"
the Vth is defined as the point where electrons == holes underneath the gate
s
I tried to simulate this transistor: this is what i get with Vd=0.01V and tt corner:
If you are more interested in strong inversion this is probably where d(Id)/d(Vg) is maximum:
f
Okay thank you. I use Vds = 10V. So, Vds must be in weak inversion, right?
s
Vds=10V is definitely wrong fo rmeasuring Vth. Usually a low drain voltage is used such that the transistor operates in the linear region, usually 10mV or 100mV.
👍 1
f
Okay thank you very much
s
Here the schematic file I used:
f
Ok, I use also mismatch models in my simulation
s
mismatch (tt_mm) models will give you a slightly diferent value on every run.
f
Perfect