So far so good. Here are some requests to efabless team. • Serious project management issues. Should hire a fulltime project/program manager. The whole show is managed ad-hoc. • Should hire a fulltime build-and-release engineer. He should run the full flow in a fresh area every time before an announcement (release). Releasing from pre-existing work area creates a lot of confusion. • No more ad-hoc documentation, please. Confusing and conflicting instructions are floating all over. Please consolidate and correct all the instructions for running the flow, precheck and tape-out. • If efabless cannot deliver silicon (parts) the whole value proposition goes for a toss. We all have access to Synopsys/Cadence/Mentor suits of tools. We have years of experience on them. The students and faculties can continue their work using these tools. The industry guys can use them as well. So, we are not so much interested to help OpenRoad guys. We are doing that to get the silicon. Please deliver the silicon back. • Keep a tab on the OpenLane/OpenRoad guys. They are well funded. No one is working for free there. If they cannot stabilize the tools/flows and methodologies, crack a deal with Synopsys/Cadence/Mentor. We want the silicon.

I disagree with you. All what they do, is to build an open and free Community for us and for the future. All difficulties we are facing today, are what we must overcome to reach the aim.,

Synopsys/Cadence/Mentor

is not the open-source software, but commercial software. We are enjoying the free lunch for tape-out chips, so why not help the teams to dig the bugs out.

No one is working for free there

I am. We have several community contributors who are not paid to work on these projects. If you see any problems, you are welcome to submit pull requests.

Totally agreed with your points. In addition, I think the idea of putting caravel around everyone's design is also fundamentally flawed and have led to multiple disappointments. Nobody, I repeat, nobody, I've ever talked to think it is a good idea. Being open-source doesn't mean you can walk away with your business decisions and take no responsibility.

In addition, I think the idea of putting caravel around everyone's design is also fundamentally flawed and have led to multiple disappointments. Nobody, I repeat, nobody, I've ever talked to think it is a good idea.

I totaly think it's a great idea. In my experience designing padring and package usually is very time consuming and a pain in the ass. Package related design issues quite frequently lead to unusable chips even than internal logic is 100% correct. Taking into account that most people here are not professional ASIC designers, it was a smart move to remove this design step from Open MPW user responsibility and create a unified test harness. Yes, Caravel had some serious issues on first runs, but that was totally expected in my opinion. And who said that your personal one shot padring and package would be glitch free on the first run? What about 40 different packages? Apart from that there are a lot of other benefits like unified test board and a possibility to check all chips at efabless, which is crucial at this point of flow and Open MPW development. It would be great to have some tapeout option for experienced analog designers who can design everything by themselves, but for now Caravel requirement is totaly justified. For now it seems that fraction of people who can (and have enough free time) to design and throghtfully document a chip from scratch is quite small here anyway.

I fully agree there is lots of room for improvement. But I totally disagree about 'we all have access to synopsys...' which is fundamentally not true. I would say 95% of this community does not have access to those tools.

Please note that OpenROAD and OpenLane/efabless are two different teams. We collaborate but are not identical. Caravel is an efabless production.

This is a place for people having no access to commercial EDA tools, this is a collective group to help bring up Opensource tools to all. Experienced people should support this collective cause.

I think there are a mix of people who do and don't have access and all are welcome.

I agree with Egor that the pad frame and Caravel are a huge head start on getting a working chip. I think one place there could be improvement, at least on this GFMPW-0 run, is to have some structure for testing. You could have your individual verilog code working but a lot could still go wrong connecting it into the rest of chip! (i.e. the management area)