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Hi, does anyone know why the XOR failed at the power ring? It seems the power rings are not aligned with the caravel setup? Do I need to change any thing in the user_project_wrappper/config.json for the power rings? Thanks

Make sure that your `FP_PDN_CORE_RING` settings match the *correct* version of `user_project_wrapper` config file.

<@U017X0NM2E7> I think I am using the most recent version now. Can you point me to the correct version? Thanks

I see the origins between the user_project_wrapper vs the user_project_wrapper_empty are different (1.55um). How do we adjust  it to align with the one from the caravel gds?

Are you resubmitting a design from a previous shuttel? Is it the same problem as <https://open-source-silicon.slack.com/archives/C0161A4A59V/p1652981163259559>?

Yes, but everything re-run with the recent caravel and openlane. I change the power ring V/H-offsets (`set ::env(FP_PDN_CORE_RING_HOFFSET) 12.45` work with config.tcl only, not the .json?) and the power rings are aligned, but not the pins. Not sure why OL changed?
<@U018LA3KZCJ> any suggestion here? can you point me to the correct setting for the pin placements? Thanks