Getting this error during precheck on efabless platform.

[12/05/22 02:47:52 PST] GPIO-DEFINES: ERROR IN VERILOG/RTL/USER_DEFINES.V
Directives(33) still placeholder (13'hXXXX) or not hex-literal: USER_CONFIG_GPIO_5_INIT=13'h0c00 USER_CONFIG_GPIO_6_INIT=13'h0c00 USER_CONFIG_GPIO_7_INIT=13'h0c00 USER_CONFIG_GPIO_8_INIT=13'h0c00 USER_CONFIG_GPIO_9_INIT=13'h0c00 USER_CONFIG_GPIO_10_INIT=13'h0c00 USER_CONFIG_GPIO_11_INIT=13'h0c00 USER_CONFIG_GPIO_12_INIT=13'h0c00 USER_CONFIG_GPIO_13_INIT=13'h0c00 USER_CONFIG_GPIO_14_INIT=13'h0c00 USER_CONFIG_GPIO_26_INIT=13'h1808 USER_CONFIG_GPIO_27_INIT=13'h1808 USER_CONFIG_GPIO_28_INIT=13'h1808 USER_CONFIG_GPIO_29_INIT=13'h1808 USER_CONFIG_GPIO_30_INIT=13'h0c00 USER_CONFIG_GPIO_31_INIT=13'h0c00 USER_CONFIG_GPIO_32_INIT=13'h0c00 USER_CONFIG_GPIO_33_INIT=13'h0c00 USER_CONFIG_GPIO_34_INIT=13'h0c00 USER_CONFIG_GPIO_35_INIT=13'h0c00 USER_CONFIG_GPIO_36_INIT=13'h0c00 USER_CONFIG_GPIO_37_INIT=13'h0c00 USER_CONFIG_GPIO_15_INIT=13'h0c00 USER_CONFIG_GPIO_16_INIT=13'h0c00 USER_CONFIG_GPIO_17_INIT=13'h0c00 USER_CONFIG_GPIO_18_INIT=13'h0c00 USER_CONFIG_GPIO_19_INIT=13'h0c00 USER_CONFIG_GPIO_20_INIT=13'h0c00 USER_CONFIG_GPIO_21_INIT=13'h0c00 USER_CONFIG_GPIO_22_INIT=13'h1808 USER_CONFIG_GPIO_23_INIT=13'h1808 USER_CONFIG_GPIO_24_INIT=13'h1808 USER_CONFIG_GPIO_25_INIT=13'h1808.. No report generated.

Have used used GPIO_MODE_MGMT_STD_INPUT_PULLDOWN and GPIO_MODE_MGMT_STD_OUTPUT only in my user_defines.v

Your

user_defines.v

is old. You need to update some files by following this instruction. https://open-source-silicon.slack.com/archives/C03R1GRP9LG/p1670054715489289

the new one only has 10bit config settings

Yes, @jeffdi suggested a couple days ago that you want to use the latest user_defines.v found here: https://github.com/efabless/caravel_user_project/blob/gf180mcu/verilog/rtl/user_defines.v

I have got the correct file now. Thanks for the suggestions.