has anyone tried to instantiate gf180mcu standard cells directly in their designs? I set

"SYNTH_READ_BLACKBOX_LIB": 1,

in the config.json but I get this error in what looks to be the library liberty files:

[ERROR]: during executing yosys script /openlane/scripts/yosys/synth.tcl
[ERROR]: Log: designs/bfg_mux_test/runs/RUN_2022.12.03_08.57.58/logs/synthesis/1-synthesis.log
[ERROR]: Last 10 lines:
[TCL: yosys -import] Command name collision: found pre-existing command `cd' -> skip.
[TCL: yosys -import] Command name collision: found pre-existing command `eval' -> skip.
[TCL: yosys -import] Command name collision: found pre-existing command `exec' -> skip.
[TCL: yosys -import] Command name collision: found pre-existing command `read' -> skip.
[TCL: yosys -import] Command name collision: found pre-existing command `trace' -> skip.
Reading /openlane/designs/bfg_mux_test/runs/RUN_2022.12.03_08.57.58/tmp/synthesis/1-gf180mcu_fd_sc_mcu7t5v0__tt_025C_3v30.no_pg.lib as a blackbox

1. Executing Liberty frontend.
ERROR: Syntax error in liberty file on line 274514.
child process exited abnormally

not sure where to file this bug.

Github issue already open: add your comment as well: https://github.com/The-OpenROAD-Project/OpenLane/issues/1535

thanks!!