Kauser Johar
12/01/2022, 3:54 PMpdks/sky130A/libs.ref/sky130_fd_sc_hd/verilog/sky130_fd_sc_hd.v
line number 49162
, there appears to be a syntax error on the line. See the code below. It has an invalid label (should have been a comment). I'm not sure where to report it, but dumping it here. My guess is that in the Caravel SoC netlist simulation flow we don't see this because we always run with USE_POWER_PINS
defined whereas I'm running on a netlist without the power pins.
From:
`endif SKY130_FD_SC_HD__LPFLOW_BLEEDER_FUNCTIONAL_V
To:
`endif // SKY130_FD_SC_HD__LPFLOW_BLEEDER_FUNCTIONAL_V
Arman Avetisyan
12/02/2022, 4:17 AMKauser Johar
12/02/2022, 10:09 AMTim Edwards
12/02/2022, 5:54 PMTim Edwards
12/02/2022, 6:21 PM