Does anyone know why these messages about the antenna diodes

sky130_fd_pr_diodepw2nd_05v5

appear after

ext2spice

when doing RC-extraction for postlayout-simulation? Can't see anything suspicious, antenna diodes straight out of OpenLane and flattened, as described in the pinned message. Magic updated to version

8.3.348

Workflow:

gds read adc_top

select top cell

snap internal

(precaution because of broken

measure

(

element

) command)

flatten adc_top_flat

Note:

-dotoplabels

copied ports from subcircuits

Note:

-nolabels

erased every port

load adc_top_flat

cellname delete adc_top

cellname rename adc_top_flat adc_top

select top cell

extract do local

extract unique

(no "label connected to more than one unconencted node" because of flattening)

extract warn no fets

(bypass mosfet-capacitor false-flags)

extract all

ext2sim labels on

ext2sim

extresist tolerance 10

extresist

Warning: via2 at 82965 78114 smaller than extract section allows (unrelated to diodes, happens once)

adding ....#; Tnew = -1989.62ns Told = -1989.82ns (negative values appear, intentional?)

Missing substrate connection of device at (2339 36861) on net VSS (Likely mos-cap)

Missing terminal connection of device at (2235 9615) on net VSS (Likely mos-cap)

ext2spice lvs

ext2spice cthresh 0

ext2spice extresist on

ext2spice

Device ndiode sky130_fd_pr__diode_pw2nd_05v5 at (8955, 38991) overlaps device with incompatible number of terminals (3 vs. 2)!

``````

No, I don't. Can you post a reproducible example (presumably only the layout is needed)?

@Tim Edwards I have attached the GDS file of the layout which was built with OpenLane

ff85171

FYI, the via "smaller than expected" error is caused by overlapping vias being chopped into smaller tiles until the extraction code thinks there isn't space for a contact cut. This can potentially cause errors in calculation of via resistance, but normally it's just slivers of cut-up tiles and ignoring them doesn't make any difference to the calculations. As for the negative time values, that's getting into very complicated and obscure code that I didn't write. I do not think there should be negative delays, since everything is just simple R*C calculations, as far as I know.

Good to know how that error occurs, Thank you for clarifying! Btw. if you stumble over

**FLOATING

caps: they are gone after

box 866 1573 83782 78688

and

erase label

before the second

select top cell

. Negative values during

extresist

and the diode-messages stay tho, but there won't be distracting floating or negative capacitances in the spice-file

The device error looks simple to fix; the code doesn't check for 2-terminal devices but just assumes that the 3rd terminal will be NULL on a 2-terminal device, which isn't true. But it's easy enough to check the device type and not print out the 3rd terminal values for a 2-terminal device.