The mgmt soc appears to be using a 1.8v liberty timing file for the sram macro. Should it be using a 5v one? https://github.com/efabless/caravel_mgmt_soc_gf180mcu/blob/main/openlane/mgmt_core_wrapper/config.tcl#L159

Yes, it should be using a 5V one. It has also been noted that the verilog file for the SRAMs have timing values for 1.8V operation instead of 5V operation.

@Anton Blanchard did you already file an issue on the mgmt soc repo?

@proppy I just opened an issue. I was going to create a PR, but the existing filename doesn't match what is in the current gf180 PDK, so I couldn't be sure any change I made was correct. (

gf180mcu_fd_ip_sram__sram512x8m8wm1__tt_025C_1v80.lib vs gf180mcu_fd_ip_sram__sram512x8m8wm1_tt_1p8v_25c.lib

)

oh yes that's totally not the same naming scheme :/

That's an issue with

caravel_mgmt_soc_gf180mcu

. open_pdks just copies what's in

gf180mcu_fd_ip_sram

from source to destination. There's nothing in there that needs modifying, so nothing gets modified. The LiteX repository probably just has a name left over from when we were transitioning between the proprietary and open PDK.