open-source-silicon.dev

Hi,
Thanks for providing this valuable opportunity.
Is there any limit on the chip area that we are going to design in this contest?

The user area is 10mm² if I'm not mistaken

Thanks for your reply.
Is it mentioned in the contest program?

We will sort this out as we go. Not everyone will be able to get 10mm^2, there will be some sharing for smaller blocks. If you have a large design and you can justify the area, it is a possibility.

In the end, keep in mind that this is a contest. The best designs will be taped out. There is no a priori assignment of area for anyone.

From the Q&amp;A: *Q:* Will I be able to allocate a full 10 mm2 *<https://caravel-harness.readthedocs.io/en/latest/|Caravel>* seat for my tapeout? *A:* It is possible, but will depend on the size of your block. We will try to combine a number of blocks to maximize chip area utilization and to create useful subsystems (for example, ADC combined with a reference generator). We will use the meetups to plan possible design mergers.

Hello <@U01RSNFAM55>, is there a number of designs defined for tapeout? In the hypothetical case that ALL the designs are good, is there place for all?

It depends on how much area each design needs. It's a contest and things will be dynamic. Some teams will drop out on their own, others may not be able to finish, etc. It is not possible (and not productive) to define the outcome at t=0. The good news is that there is always fallback with the Google MPWs. The benefit you get from participating here is networking &amp; mentorship.