Hello everyone When simulating pmos this error happens, what is the solution ? Thank you

@Roshan Mohyeldeen as far as I know there is a limit of W/L ratio, try to lower the value of W, try something below 100

Could you post your spice netlist?

@Roshan Mohyeldeen if you want a W/L 140 set W to 10 and then set mult parameter to 14

Thank you the problem was indeed in the aspect ratio, i edited it and it worked

@Roshan Mohyeldeen as far as I understand the mult factor just multiplies the number of transistor which You can put in parallel fashion to increase W by a factor of mult. The nf divides the overall gate width into nf fingers what improves gate capacitance and shrinks the device due to drain-source overlap

Yes I agree with @Krzysztof Herman. @Roshan Mohyeldeen You can use mult parameter here.

Thanks a lot