Arman Avetisyan
07/15/2022, 11:00 AMTim Edwards
07/15/2022, 8:55 PMArman Avetisyan
07/16/2022, 6:35 AMTim Edwards
07/17/2022, 5:07 PMload <cellname>
flatten my_flat_cell
load my_flat_cell
extract do local
extract all
ext2sim labels on
ext2sim
extresist tolerance 10
extresist
ext2spice lvs
ext2spice cthresh 0
ext2spice extresist on
ext2spice
This would result in an output file my_flat_cell.spice
that would be the full R-C extracted circuit.