Hello guys, can any one help me out that while I'm trying to give a run the user_proj_example(my design) getting lvs errors [1] in mpw-7a, if that user_proj_example directly including that into user_project_wrapper config means its passing the lvs but now I'm getting DRC errors[2] I don't know why, Can you guys help me? 1. LVS reports: net count difference = 8 device count difference = 0 unmatched nets = 3887 unmatched devices = 208 unmatched pins = 0 property failures = 0 Total errors = 4103 ; 2. user_project_wrapper ---------------------------------------- Min area of metal1 holes > 0.14um^2 (met1.7) ---------------------------------------- 583.255um 1132.485um 583.440um 1132.640um 491.210um 1353.580um 491.425um 1353.640um 491.120um 1353.440um 491.425um 1353.580um 863.260um 572.180um 863.565um 572.320um 863.350um 572.120um 863.565um 572.180um 737.815um 570.080um 738.000um 570.235um 1506.890um 1081.580um 1507.105um 1081.640um 1506.800um 1081.440um 1507.105um 1081.580um 1506.015um 1268.485um 1506.200um 1268.640um 1793.380um 1307.015um 1793.625um 1307.060um 1793.380um 1306.920um 1793.700um 1307.015um 1793.470um 1306.860um 1793.700um 1306.920um ---------------------------------------- [INFO]: COUNT: 12 [INFO]: Should be divided by 3 or 4

can you share your repo link?

Is this https://github.com/RTimothyEdwards/open_pdks/pull/262

@Anton Blanchard No just now I tried for sky130A also getting same errors

share the

lef.log

1. To get a wider report,

export NETGEN_COLUMNS=80

2. Nets counts are different. Try to find what nets are in the layout, but not the netlist.

Number of nets: 55373 **Mismatch**         |Number of nets: 55365 **Mismatch**

These look problematic:

Net: memory_spram.DUT3/vccd1               
  sky130_sram_1kbyte_1rw1r_32x256_8/vccd1 
...
Net: memory_spram.DUT3/vssd1               
  sky130_sram_1kbyte_1rw1r_32x256_8/vssd1

Looks like the sram macro is not connected to the power rails. With a difference of 8 nets and 4 sram macros, I'm guessing that the sram macros are all missing power connections.

hello @Mitch Bailey, I used same config in the old version of Openlane it was passing there but we are getting antenna violations to fix those antenna violations I'm using this New version of Openlane but here it is failing on the lvs stage. Can you help me how to fix this lvs errors?

Check your layout to see that your sram modules are connected to power.

@Akula Eswar Do you set

GLB_RT_OBS

for sram macros placement?

@Vijayan Krishnan No, I used these two commands for the macros:- set ::env(USE_SRAM_ABSTRACT) "1" set ::env(SRAM_ABSTRACT_MODEL)

what this configuration does? may i get details of configuration

@Vijayan Krishnan earlier I got DRC errors inside the sram after using these commands we are able to pass the run.

@Akula Eswar Please be aware that the LVS in openlane is an abstract LVS, meaning that the lower levels may not include all the devices. LVS should pass on all levels of the design (or you should know exactly why it doesn't pass. ex. duplicate unconnected text that connects at a higher level.)