I was trying to make user_preject_wrapper. There are 4 macros. Two of them are hardened before using openlane successfully. And 2 are openram memories (1K, 8bit) used off the shelf of sky130A pdk. At the end the openlane flow failed after 64th optimization, while routing in detail, with 15 violations. Is there a way to increase the no of optimizations > 64? Will that help? Any other suggestions...has anyone faced this before? I am planning to root cause the issue in detail. But wanted to get a quick opinion from the forum to save time.

There is a lot of missing information: Density? Cell count? Distance between macros? Floorplan die area? Post you design on GitHub so people can take a look. (assuming its not confidential) My guess is: your density/util is too high and combined with dense macro placement you have high routing congestion

The two macros that I have hardened is pretty small. Density is 0.1. Areas are 240x180um and 320x224 um. Openram area is 455x445um. But I don't know the density of openrams.

@Lab Lecture share your git repo link with all input

Distance between macros - Actually I am not very clear about the conventions used in macro.cfg. memLword 50 50 N memHword 1000 50 N cpu0 2000 50 N mprj 2000 500 N This is my macro.cfg. I assume that memLword start at x=50 and ends at x=455+50=505 memHword starts at x=1000. So distance between two rams is 1000-505=495 micron. Is that correct?

runs/runtag/reports/signoff/drc.rpt

check for drc errors

Thanks Vijay, thanks Arman.

One more suggestion: Use openroad -gui and take a loot at generated DEF

yes make sure you look at the floorplan. A lot of times when people run into this they have macros overlapping or too close