open-source-silicon.dev

Hello <@U017UPJEGKZ>,
Regarding your openPMIC project, we saw that you use 5 analog pads for the vssa2 reference (and 3 analog pads for SW_NODE and VDD_PWR). The pads are 25um width and the max current density for metal 5 is 2.3mA/um (from here: <https://docs.google.com/spreadsheets/d/1oL6ldkQdLu-4FEQE0lX6BcgbqzYfNnd1XA8vERe0vpE/edit#gid=1059412464>), which gives a bit less that the 300mA that you use in your design. Is this the calculation you did? If so, what I don't completely understand yet is the fact that the pads appear as metal 4 in the caravan file, which would lower the electromigration current density limit. Any comments on this?

I am grossly exceeding the current limit for the metal. No real way around it if you are using the provided pad frame.

the connections are on M4 because the I/O power rings used by the test harness are on M5

In a production chip such an excess over the current density would be a limit. for a test chip is ok

The resistance of the metal runner to the pad and the bond wire almost doubles my effective switch resistance