Facing following error while running `make extract...
# timing-closure
v
Facing following error while running
make extract-parasitics
Copy code
make extract-parasitics
2022-11-26 14:30:15,329 |      get_macros |   INFO | getting pdk macros..
2022-11-26 14:30:15,622 |      get_macros |   INFO | parsing netlist ./verilog/gl/user_project_wrapper.v ..
Traceback (most recent call last):
  File "/home/vijayan/CARAVEL_FLOW/mpw7_resubmission/graphics_controller_mpw7/graphics_controller_resubmit/deps/timing-scripts/scripts/get_macros.py", line 121, in <module>
    main()
  File "/home/vijayan/CARAVEL_FLOW/mpw7_resubmission/graphics_controller_mpw7/graphics_controller_resubmit/venv/lib64/python3.6/site-packages/click/core.py", line 1128, in __call__
    return self.main(*args, **kwargs)
  File "/home/vijayan/CARAVEL_FLOW/mpw7_resubmission/graphics_controller_mpw7/graphics_controller_resubmit/venv/lib64/python3.6/site-packages/click/core.py", line 1053, in main
    rv = self.invoke(ctx)
  File "/home/vijayan/CARAVEL_FLOW/mpw7_resubmission/graphics_controller_mpw7/graphics_controller_resubmit/venv/lib64/python3.6/site-packages/click/core.py", line 1395, in invoke
    return ctx.invoke(self.callback, **ctx.params)
  File "/home/vijayan/CARAVEL_FLOW/mpw7_resubmission/graphics_controller_mpw7/graphics_controller_resubmit/venv/lib64/python3.6/site-packages/click/core.py", line 754, in invoke
    return __callback(*args, **kwargs)
  File "/home/vijayan/CARAVEL_FLOW/mpw7_resubmission/graphics_controller_mpw7/graphics_controller_resubmit/deps/timing-scripts/scripts/get_macros.py", line 71, in main
    for macro in run(input, project_root, pdk_macros, logger, macro_parent):
  File "/home/vijayan/CARAVEL_FLOW/mpw7_resubmission/graphics_controller_mpw7/graphics_controller_resubmit/deps/timing-scripts/scripts/get_macros.py", line 78, in run
    parsed = VerilogParser(input, logger)
  File "/home/vijayan/CARAVEL_FLOW/mpw7_resubmission/graphics_controller_mpw7/graphics_controller_resubmit/deps/timing-scripts/scripts/verilog_parser.py", line 12, in __init__
    self.yosys_to_json()
  File "/home/vijayan/CARAVEL_FLOW/mpw7_resubmission/graphics_controller_mpw7/graphics_controller_resubmit/deps/timing-scripts/scripts/verilog_parser.py", line 26, in yosys_to_json
    stderr=subprocess.STDOUT,
  File "/usr/lib64/python3.6/subprocess.py", line 423, in run
    with Popen(*popenargs, **kwargs) as process:
  File "/usr/lib64/python3.6/subprocess.py", line 729, in __init__
    restore_signals, start_new_session)
  File "/usr/lib64/python3.6/subprocess.py", line 1364, in _execute_child
    raise child_exception_type(errno_num, err_msg, err_filename)
FileNotFoundError: [Errno 2] No such file or directory: 'yosys': 'yosys'
make: *** [extract-parasitics] Error 1
k
can you try again?
v
Can you give me the steps to update my efabless fork and steps to try again?
m
I've seen this as well
you need yosys installed locally
I do it with installing this package: https://github.com/YosysHQ/setup-oss-cad-suite