Makes sense. So yea I kinda figured out what the "well" is, it's basically just a keepout area. So I guess I need to draw my own well. What's surprising me is that a pmos transistor without a well isn't a DRC error.

@Pepijn de Vos I believe the PMOS should have nwell. I don't remember that we needed a pwell layer for NMOS assuming that you are placing it on substrate area. But if you need to put it in PWELL you have to draw that manually. It's not mandatory to have your NMOS in PWELL.