Is it possible to do complete layout using only Klayout and not magic for both

open mpw

and

chipignite

shuttles ? Are there any limitations while using Klayout with these pdks? What I found is that pcells for all devices in sky130 is not available for klayout.

Hi, someone tries to install Klayout on Amazon Linux2?

Hi, I have this error when I’m trying to open klayout

Hello, does anyone know why I only see the lines and not the colors of the masks?

I am trying to run DRC, but I have this error

IMG_1867.jpg

Hello, I don't understand why the same macros that the 180 pdk has, have many errors or that have to be activated to validate the design rules on these

hello, I want to know if in an "instance cell" it is possible to edit layers inside these cells, like this contact that I want to delete but I can't select it, it always selects the whole cell, and in the cell editor it doesn't give the option to remove that contact directly in GF180.

hello, when I do "Run Klayout DRC " for GF180 I get the following error, I don't know if anyone has had the same error, I followed efabless video of gf180 single video and do the same for DRC and LVS.

@Kennedy Caisley has left the channel

Is it possible to import spice netlist generated from xschem in Klayout for schematic driven layout (SDL) ? Something similar to as done in magic.

@yrrapt Using

KLAYOUT_HOME=$PDK_ROOT/$PDK/libs.tech/klayout  klayout -e

to invoke klayout with sky130 pdk. But only layer nos. are visible on layers pallete and not names. Need to manually import

.lyp

file everytime in order to see layer names inside klayout. Can you suggest solution to this issue.

Press the technology button that has 'sky130' written on it

Hi, I updated today the file globalfoundries-pdk-libs-gf180mcu_fd_Pv but I have this error again when I run DRC. @Amro Tork @Farag Elsayed

Does anybody know, what are rules for creating a fill_config file for klayout ? I mean something like this:

<https://github.com/KrzysztofHerman/OpenROAD-flow-scripts/blob/ihp-platform/flow/platforms/sky130hd/fill.json>

one but for other technology (IHP130)

@yrrapt @Matt Venn Can gds of individual pcells (nmos,pmos,res,cap) generated from magic be imported in top level klayout sheet? Or individual gds first need to be imported inside klayout, saved there and then instantiated in top level layout. Not clear from below video.

Either way, just need to try and see what works best for you

Hi All, what are the steps to setup DRC for sky130 in klayout again? I accidentally removed the klayout directory in my local machine and I'm trying to set it up again.

Hi All - Has any one tried to mix scripted layout using gdsfactory and native klayout interface? I script a layout using gdsfactory but want to add klayout native path object. Path object in gdsfactory are conceptual different and created for photonices and not manhatten stile routing.

@VKS There is a problem with integrating Sky130 with Klayout. Followed the exact steps as explained in the workshop.

Hi to all, I'm trying to set up a windows environment that can use klayout to evaluate drc and lvs without docker or linux, but there are problems that makes me think it is not possible. I'm using mamba/conda to install docopt and manually cloned the globalfoundries and precheck repositories. Running GlobalFoundries DRC gives this error

> python E:\Descargas\ic_analog\code\layout\globalfoundries-pdk-libs-gf180mcu_fd_pv\klayout\drc\run_drc.py --variant=C --path=RING_PAD.gds --verbose

02-Oct-2023 17:10:41 | INFO    | Your Klayout version is: KLayout 0.28.12
02-Oct-2023 17:10:41 | INFO    | Your Klayout version is: KLayout 0.28.12
02-Oct-2023 17:10:41 | INFO    | ## Generating template with for the following rule tables: ['comp.drc', 'contact.drc', 'dnwell.drc', 'drc_bjt.drc', 'dualgate.drc', 'dummy_exclude.drc', 'efuse.drc', 'esd.drc', 'hres.drc', 'ldnmos.drc', 'ldpmos.drc', 'lres.drc', 'lvpwell.drc', 'lvs_bjt.drc', 'mcell.drc', 'metal1.drc', 'metal2.drc', 'metal3.drc', 'metal4.drc', 'metal5.drc', 'metaltop.drc', 'metaltop_30k.drc', 'mim_a.drc', 'mim_b.drc', 'nat.drc', 'nplus.drc', 'nwell.drc', 'otp_mk.drc', 'poly2.drc', 'pplus.drc', 'pres.drc', 'sab.drc', 'sram_3p3.drc', 'sram_5p0.drc', 'via1.drc', 'via2.drc', 'via3.drc', 'via4.drc', 'via5.drc', 'ymtp_mk.drc']
02-Oct-2023 17:10:41 | INFO    | ## Your run dir located at: E:\Descargas\ic_analog\code\layout\drc_run_2023_10_02_20_10_41
02-Oct-2023 17:10:41 | INFO    | Running Global Foundries 180nm MCU E:\Descargas\ic_analog\code\layout\RING_PAD.gds checks on design main on cell RING_PAD:
Traceback (most recent call last):
  File "E:\Descargas\ic_analog\code\layout\globalfoundries-pdk-libs-gf180mcu_fd_pv\klayout\drc\run_drc.py", line 693, in <module>
    main(drc_run_dir, arguments)
  File "E:\Descargas\ic_analog\code\layout\globalfoundries-pdk-libs-gf180mcu_fd_pv\klayout\drc\run_drc.py", line 650, in main
    run_single_processor(
  File "E:\Descargas\ic_analog\code\layout\globalfoundries-pdk-libs-gf180mcu_fd_pv\klayout\drc\run_drc.py", line 601, in run_single_processor
    run_check(drc_file, "main", layout_path, drc_run_dir, switches)
  File "E:\Descargas\ic_analog\code\layout\globalfoundries-pdk-libs-gf180mcu_fd_pv\klayout\drc\run_drc.py", line 452, in run_check
    check_call(run_str, shell=True)
  File "E:\source\mambaforge\envs\chipathon\Lib\subprocess.py", line 413, in check_call
    raise CalledProcessError(retcode, cmd)
subprocess.CalledProcessError: Command 'klayout -b -r E:\Descargas\ic_analog\code\layout\drc_run_2023_10_02_20_10_41\main.drc -rd thr=2 -rd run_mode=flat -rd metal_top=9K -rd mim_option=B -rd metal_level=5LM -rd verbose=true -rd feol=true -rd beol=true -rd offgrid=true -rd conn_drc=false -rd density=false -rd slow_via=false -rd topcell=RING_PAD -rd input=E:\Descargas\ic_analog\code\layout\RING_PAD.gds -rd report=E:\Descargas\ic_analog\code\layout\drc_run_2023_10_02_20_10_41\RING_PAD_main.lyrdb -rd table_name=main' returned non-zero exit status 1.

Executing the last message without -b flag gives this error:

> klayout -r E:\Descargas\ic_analog\code\layout\drc_run_2023_10_02_20_10_41\main.drc -rd thr=2 -rd run_mode=flat -rd metal_top=9K -rd mim_option=B -rd metal_level=5LM -rd verbose=true -rd feol=true -rd beol=true -rd offgrid=true -rd conn_drc=false -rd density=false -rd slow_via=false -rd topcell=RING_PAD -rd input=E:\Descargas\ic_analog\code\layout\RING_PAD.gds -rd report=E:\Descargas\ic_analog\code\layout\drc_run_2023_10_02_20_10_41\RING_PAD_main.lyrdb -rd table_name=main

NoMethodError: undefined method `strip' for nil:NilClass in Executable::execute
  E:\Descargas\ic_analog\code\layout\drc_run_2023_10_02_20_10_41\main.drc:29:in `block in execute'
  C:/Users/akiles/AppData/Roaming/Klayout/lib/ruby/3.0.0/logger.rb:586:in `format_message'
  C:/Users/akiles/AppData/Roaming/Klayout/lib/ruby/3.0.0/logger.rb:476:in `add'
  C:/Users/akiles/AppData/Roaming/Klayout/lib/ruby/3.0.0/logger.rb:529:in `info'
  E:\Descargas\ic_analog\code\layout\drc_run_2023_10_02_20_10_41\main.drc:36:in `execute'
  :/built-in-macros\drc_interpreters.lym:31:in `instance_eval'
  :/built-in-macros\drc_interpreters.lym:31:in `execute'

Running the Precheck DRC with klayout in GUI mode, gives this log error:

> klayout -r E:\Descargas\ic_analog\code\layout\mpw_precheck\checks\tech-files\gf180mcuC_mr.drc

NoMethodError: undefined method `strip' for nil:NilClass in Executable::execute
  E:\Descargas\ic_analog\code\layout\mpw_precheck\checks\tech-files\gf180mcuC_mr.drc:39:in `getMemSize'
  E:\Descargas\ic_analog\code\layout\mpw_precheck\checks\tech-files\gf180mcuC_mr.drc:118:in `block in execute'
  C:/Users/akiles/AppData/Roaming/Klayout/lib/ruby/3.0.0/logger.rb:586:in `format_message'
  C:/Users/akiles/AppData/Roaming/Klayout/lib/ruby/3.0.0/logger.rb:476:in `add'
  C:/Users/akiles/AppData/Roaming/Klayout/lib/ruby/3.0.0/logger.rb:529:in `info'
  E:\Descargas\ic_analog\code\layout\mpw_precheck\checks\tech-files\gf180mcuC_mr.drc:129:in `execute'
  :/built-in-macros\drc_interpreters.lym:31:in `instance_eval'
  :/built-in-macros\drc_interpreters.lym:31:in `execute'

I'm posting the drc generated by the

run_drc.py

script, but I think that is more a missing dependency inside Klayout's ruby packed version.

Initialization of layers failed: Unable to open file: /foss/pdks/volare/sky130/versions/dd7771c384ed36b91a25e9f8b314355fc26561be/sky130B/libs.tech/klayout/tech/sky130.lyp (errno=2) When importing SKY130B into klayout there is this error, the layers cannot show

Hi everyone, I have configured SKY130B as my technology in order to use the ReRAM devices. However, when I open the klayout, I haven't found the layers for ReRAM. I cloned one ReRAM object from github and found they have additional 3 layers which is added to layout when I opened it but didn't exist in the original .lyt file. So should we add these three layers by ourselves?

Hello everyone Is there a way to extrac a netlist from klayout without lvs? I was running

run_lvs.py

script for a simple inverter from this repo: https://github.com/efabless/globalfoundries-pdk-libs-gf180mcu_fd_pv/tree/mainand and I got that the netlist don't match. To check if I was doing something wrong I tried with a nfet pcell but also got that the netlist don't match. I think that the labels are being misinterpreted while running the lvs since the nodes in the .cir file are named by numbers instead of the actual labels.

Hello everyone, I have a weird issue when I'm launching an LVS in KLayout. The LVS (adder_opt_1b and adder_32bit_CSA) works fine individually, but when I combine these circuits with others, I encounter a problem. The LVS reports that there is a pin not found in the netlist, but this pin in the layout doesn't exist. Do you know what could be causing this problem? Thanks for your help

#shuttle-precheck During pre-check some FEOL errors related to

psdm

layer are coming. I tried to rectify them by putting extra

psdm

layer wherever errors are coming inside klayout in edit mode. But this selected layer is not getting drawn as shown in attached video. Please suggets how to make it work.

#magic @Tim Edwards While closing magic layout following error/warning appears in console. Why is it appearing and what should be done in this case?

Hi everyone, I'm trying to add a python package (directory with _ init _.py and bunch of py modules) into macro development as a pcell library, but klayout is not able to recognize it and relative references between submodules don't work. If everything is on the same file, it works, but that's not modular nor scalable. There's any resource that explains how to register that package into klayout? @Matthias Köfferlein

can anyone help..while running build command for klayout.28.12 getting error like this...

Getting this error while doing drc