I am getting a lot of "*** is used but has no driv...
# openlane
a
I am getting a lot of "*** is used but has no driver warnings" in the synthesis log. Should I be worried about these? I am pretty sure these signals are properly driven in my DUT--works in simulation and also FPGA emulation. Attaching a grep for this signal called "reset_reg", which apparently has no driver according to the logs; definition shown below.
Copy code
always@(posedge clock)
    if(reset)             reset_reg<= 1'b0;
    else if (reset_write) reset_reg<= int_wr_data[0];
a
Some are okay, some are not. Yosys by default does not remove the nets that were connected to DFFs. It does so in "clean" command. In this example this is most likely cause. Not all "is used but has no driver warnings" are caused by the same thing. Go all over the warnings, and make sure you have no issues. E.g. Make sure you have no dangling nets, that the same flip flop is not assigned somewhere else, and no cells are optimized away. In the given piece of code this can be caused by a lot of things: clock is stuck OR int_wr_data[0] and reset_write and reset is stuck at some value. OR it's assigned somewhere else too. OR the output reset_reg is not used. Again, in the particular example you gave, most likely it's caused by DFF synthesis, not the above mentioned reasons.
a
I do see the cell driving reset_reg in the final netlist; it also has the necessary combinational logic at its input. But I am just not clear on the reason why the log would say no driver, when there exists one. "most likely it's caused by DFF synthesis"--not sure what this means. There should be a driver to the DFF too, right, and in fact there is, in the netlist as I observe.