Hi, does anyone know how much address space the management core can access via the user wishbone bus? The documentation says that it starts at 0x3000_0000, but I can't seem to find a size. I was expecting this would mean it has a 28bit address, but in practice it seems I can only get the management core to use a 20bit address. The address I use for the wishbone bus I've defined in user space uses a 28bit address, so it means I can't access everything from the management core.

it should be up to 0x3fff_ffff, but there was a bug that limits the size to 0x3001_0000

Ah, thanks for the help. I was looking in the code for the management core, and it does seem to check if the top 12bits are 0x300, so I guess I need to design around that for now. Any idea if this is likely to be fixed for MPW-6?

I'm not sure, @jeffdi should know. It wasn't done for mpw5 because of time constraints on re-verifying all the timing checks necessary after making a change to the management core

I thought that might be the case, I'll assume it won't be fixed for now, and see if I can design in a workaround.

probably wise