Ming Hung Chen
05/19/2022, 8:23 PMMatthew Guthaus
05/19/2022, 8:52 PMMatthew Guthaus
05/19/2022, 8:52 PMMing Hung Chen
05/19/2022, 9:38 PMmake sky130_sram_tiny
, and it displays
Building sky130_sram_tiny
docker run -v /home/kevinchen/OpenRAM:/openram \
-v /sky130A:/sky130A \
-e PDK_ROOT= \
-e OPENRAM_HOME=/openram/compiler \
-e OPENRAM_TECH=/openram/technology \
-e OPENRAM_TMP=/openram/macros/sky130_sram_tiny/tmp \
--user 1016:1017 \
vlsida/openram-ubuntu:latest \
python3 -u /openram/compiler/openram.py -v --keeptemp -o sky130_sram_tiny -p /openram/macros/sky130_sram_tiny /openram/macros/configs/sky130_sram_tiny.py && touch sky130_sram_tiny.ok
[globals/init_openram]: Initializing OpenRAM...
[globals/setup_paths]: Temporary files saved in /openram/macros/sky130_sram_tiny/tmp/
[globals/read_config]: Configuration file is /openram/macros/configs/sky130_sram_tiny.py
[globals/read_config]: Output saved in /openram/macros/sky130_sram_tiny/
[globals/import_tech]: Adding technology path: /openram/technology
Traceback (most recent call last):
File "/openram/compiler/openram.py", line 35, in <module>
g.init_openram(config_file=args[0], is_unit_test=False)
File "/openram/compiler/globals.py", line 202, in init_openram
import_tech()
File "/openram/compiler/globals.py", line 566, in import_tech
tech_mod = __import__(OPTS.tech_name)
File "/openram/technology/sky130/__init__.py", line 32, in <module>
raise SystemError("Did not find {} under {}".format(sky130_lib_ngspice, open_pdks))
SystemError: Did not find sky130A/libs.tech/ngspice/sky130.lib.spice under sky130A/libs.tech
make[1]: *** [sky130_sram_tiny.ok] Error 1
make: *** [sky130_sram_tiny] Error 2
Ming Hung Chen
05/19/2022, 9:38 PMMatthew Guthaus
05/19/2022, 9:45 PMMing Hung Chen
05/19/2022, 9:49 PMPDK_ROOT=$(TOP_DIR)
. But it still displays some module name error.
Building sky130_sram_tiny
docker run -v /home/kevinchen/OpenRAM:/openram \
-v /home/kevinchen/OpenRAM/sky130A:/home/kevinchen/OpenRAM/sky130A \
-e PDK_ROOT=/home/kevinchen/OpenRAM \
-e OPENRAM_HOME=/openram/compiler \
-e OPENRAM_TECH=/openram/technology \
-e OPENRAM_TMP=/openram/macros/sky130_sram_tiny/tmp \
--user 1016:1017 \
vlsida/openram-ubuntu:latest \
python3 -u /openram/compiler/openram.py -v --keeptemp -o sky130_sram_tiny -p /openram/macros/sky130_sram_tiny /openram/macros/configs/sky130_sram_tiny.py && touch sky130_sram_tiny.ok
[globals/init_openram]: Initializing OpenRAM...
[globals/setup_paths]: Temporary files saved in /openram/macros/sky130_sram_tiny/tmp/
[globals/read_config]: Configuration file is /openram/macros/configs/sky130_sram_tiny.py
[globals/read_config]: Output saved in /openram/macros/sky130_sram_tiny/
[globals/import_tech]: Adding technology path: /openram/technology
Traceback (most recent call last):
File "/openram/compiler/openram.py", line 35, in <module>
g.init_openram(config_file=args[0], is_unit_test=False)
File "/openram/compiler/globals.py", line 202, in init_openram
import_tech()
File "/openram/compiler/globals.py", line 576, in import_tech
import tech
File "/openram/technology/sky130/tech/__init__.py", line 12, in <module>
from .tech import *
File "/openram/technology/sky130/tech/tech.py", line 119, in <module>
cell_properties.col_cap_1port_bitcell = cell(['br', 'vdd', 'gnd', 'bl', 'gate'],
NameError: name 'cell' is not defined
make[1]: *** [sky130_sram_tiny.ok] Error 1
make: *** [sky130_sram_tiny] Error 2
Matthew Guthaus
05/19/2022, 9:52 PMMatthew Guthaus
05/19/2022, 9:54 PMMing Hung Chen
05/19/2022, 10:05 PM[globals/init_openram]: Initializing OpenRAM...
[globals/setup_paths]: Temporary files saved in /openram/macros/sky130_sram_tiny/tmp/
[globals/read_config]: Configuration file is /openram/macros/configs/sky130_sram_tiny.py
[globals/read_config]: Output saved in /openram/macros/sky130_sram_tiny/
[globals/import_tech]: Adding technology path: /openram/technology
[globals/init_paths]: Creating temp directory: /openram/macros/sky130_sram_tiny/tmp/
[globals/setup_bitcell]: Using bitcell: bitcell_2port
[characterizer/<module>]: Initializing characterizer...
[characterizer/<module>]: Analytical model enabled.
[verify/<module>]: Initializing verify...
[verify/<module>]: Finding DRC/LVS/PEX tools.
[globals/get_tool]: Using DRC: /usr/local/bin/magic
[globals/get_tool]: Using LVS: /usr/local/bin/netgen
[globals/get_tool]: Using PEX: /usr/local/bin/magic
[globals/setup_bitcell]: Using bitcell: bitcell_2port
|==============================================================================|
|========= OpenRAM v1.1.18 =========|
|========= =========|
|========= VLSI Design and Automation Lab =========|
|========= Computer Science and Engineering Department =========|
|========= University of California Santa Cruz =========|
|========= =========|
|========= Usage help: <mailto:openram-user-group@ucsc.edu|openram-user-group@ucsc.edu> =========|
|========= Development help: <mailto:openram-dev-group@ucsc.edu|openram-dev-group@ucsc.edu> =========|
|========= Temp dir: /openram/macros/sky130_sram_tiny/tmp/ =========|
|========= See LICENSE for license info =========|
|==============================================================================|
** Start: 05/19/2022 14:54:37
Technology: sky130
Total size: 128 bits
Word size: 8
Words: 16
Banks: 1
Write size: 2
RW ports: 1
R-only ports: 1
W-only ports: 0
DRC/LVS/PEX is only run on the top-level design to save run-time (inline_lvsdrc=True to do inline checking).
Characterization is disabled (using analytical delay models) (analytical_delay=False to simulate).
Only generating nominal corner timing.
[sram_config/recompute_sizes]: Recomputing with words per row: 1
[sram_config/recompute_sizes]: Rows: 16 Cols: 8
[sram_config/recompute_sizes]: Row addr size: 4 Col addr size: 0 Bank addr size: 4
[sram_config/compute_sizes]: Set SRAM Words Per Row=1
Words per row: 1
Output files are:
/openram/macros/sky130_sram_tiny/sky130_sram_tiny.lvs
/openram/macros/sky130_sram_tiny/sky130_sram_tiny.sp
/openram/macros/sky130_sram_tiny/sky130_sram_tiny.v
/openram/macros/sky130_sram_tiny/sky130_sram_tiny.lib
/openram/macros/sky130_sram_tiny/sky130_sram_tiny.py
/openram/macros/sky130_sram_tiny/sky130_sram_tiny.html
/openram/macros/sky130_sram_tiny/sky130_sram_tiny.log
/openram/macros/sky130_sram_tiny/sky130_sram_tiny.lef
/openram/macros/sky130_sram_tiny/sky130_sram_tiny.gds
[bitcell_base_array/__init__]: Creating sky130_sram_tiny_replica_bitcell_array 16 x 8
[dff_array/__init__]: Creating sky130_sram_tiny_data_dff rows=1 cols=8
[dff_array/__init__]: Creating sky130_sram_tiny_wmask_dff rows=1 cols=4
[control_logic/__init__]: Creating control_logic_rw
[dff_buf/__init__]: Creating sky130_sram_tiny_dff_buf
[dff_buf_array/__init__]: Creating sky130_sram_tiny_dff_buf_array
[dff_buf/__init__]: Creating sky130_sram_tiny_dff_buf_0
[pand2/__init__]: Creating pand2 pand2_0
[pdriver/__init__]: creating pdriver pdriver_0
[pbuf/__init__]: creating pbuf with size of 8
[pdriver/__init__]: creating pdriver pdriver_1
[pdriver/__init__]: creating pdriver pdriver_2
[pand3/__init__]: Creating pand3 pand3
[pdriver/__init__]: creating pdriver pdriver_3
[pand3/__init__]: Creating pand3 pand3_0
[pdriver/__init__]: creating pdriver pdriver_4
[pdriver/__init__]: creating pdriver pdriver_5
[delay_chain/__init__]: creating delay chain [4, 4, 4, 4, 4, 4, 4, 4, 4]
[control_logic/__init__]: Creating control_logic_r
[dff_buf_array/__init__]: Creating sky130_sram_tiny_dff_buf_array_0
[pdriver/__init__]: creating pdriver pdriver_6
** Submodules: 0.9 seconds
** Placement: 0.0 seconds
[router_tech/__init__]: Minimum track width: 0.680
[router_tech/__init__]: Minimum track space: 0.300
[router_tech/__init__]: Minimum track wire width: 0.380
[hierarchy_layout/get_bbox]: Size: 213.96 x 149.49 with perimeter margin 0.6799999999999999
[hierarchy_layout/get_bbox]: Size: 213.96 x 149.49 with perimeter margin 7.4799999999999995
[router_tech/__init__]: Minimum track width: 0.680
[router_tech/__init__]: Minimum track space: 0.300
[router_tech/__init__]: Minimum track wire width: 0.380
[grid/__init__]: BBOX coords: ll=v[-48.94,-31.93] ur=v[179.98,132.52]
[grid/__init__]: BBOX grids: ll=v3d[-72, -47, 0.0] ur=v3d[265, 195, 0.0]
**** Retrieving pins: 0.0 seconds
**** Analyzing pins: 0.0 seconds
[router/find_blockages]: Finding blockages.
**** Finding blockages: 0.4 seconds
[router/convert_blockages]: Converting blockages.
**** Converting blockages: 0.1 seconds
**** Converting pins: 0.1 seconds
**** Separating adjacent pins: 0.0 seconds
*** Finding pins and blockages: 3.9 seconds
[signal_escape_router/route_signal]: Escape routing csb1 with scale 5
[signal_escape_router/route_signal]: Escape routing csb0 with scale 5
[signal_escape_router/route_signal]: Escape routing web0 with scale 5
[signal_escape_router/route_signal]: Escape routing din0[0] with scale 5
[signal_escape_router/route_signal]: Escape routing din0[1] with scale 5
[signal_escape_router/route_signal]: Escape routing din0[2] with scale 5
[signal_escape_router/route_signal]: Escape routing din0[3] with scale 5
[signal_escape_router/route_signal]: Escape routing din0[4] with scale 5
[signal_escape_router/route_signal]: Escape routing din0[5] with scale 5
[signal_escape_router/route_signal]: Escape routing din0[6] with scale 5
[signal_escape_router/route_signal]: Escape routing din0[7] with scale 5
[signal_escape_router/route_signal]: Escape routing wmask0[0] with scale 5
[signal_escape_router/route_signal]: Escape routing wmask0[1] with scale 5
[signal_escape_router/route_signal]: Escape routing wmask0[2] with scale 5
[signal_escape_router/route_signal]: Escape routing wmask0[3] with scale 5
[signal_escape_router/route_signal]: Escape routing clk0 with scale 5
[signal_escape_router/route_signal]: Escape routing clk1 with scale 5
[signal_escape_router/route_signal]: Escape routing addr0[3] with scale 5
[signal_escape_router/route_signal]: Escape routing dout1[0] with scale 5
[signal_escape_router/route_signal]: Escape routing dout1[1] with scale 5
[signal_escape_router/route_signal]: Escape routing dout1[2] with scale 5
[signal_escape_router/route_signal]: Escape routing dout1[3] with scale 5
[signal_escape_router/route_signal]: Escape routing dout1[4] with scale 5
[signal_escape_router/route_signal]: Escape routing dout1[5] with scale 5
[signal_escape_router/route_signal]: Escape routing dout1[6] with scale 5
[signal_escape_router/route_signal]: Escape routing dout1[7] with scale 5
[signal_escape_router/route_signal]: Escape routing addr1[0] with scale 5
[signal_escape_router/route_signal]: Escape routing addr1[1] with scale 5
[signal_escape_router/route_signal]: Escape routing addr1[2] with scale 5
[signal_escape_router/route_signal]: Escape routing addr1[3] with scale 5
[signal_escape_router/route_signal]: Escape routing addr0[2] with scale 5
[signal_escape_router/route_signal]: Escape routing addr0[0] with scale 5
[signal_escape_router/route_signal]: Escape routing addr0[1] with scale 5
[signal_escape_router/route_signal]: Escape routing dout0[0] with scale 5
[signal_escape_router/route_signal]: Escape routing dout0[1] with scale 5
[signal_escape_router/route_signal]: Escape routing dout0[2] with scale 5
[signal_escape_router/route_signal]: Escape routing dout0[3] with scale 5
[signal_escape_router/route_signal]: Escape routing dout0[4] with scale 5
[signal_escape_router/route_signal]: Escape routing dout0[5] with scale 5
[signal_escape_router/route_signal]: Escape routing dout0[6] with scale 5
[signal_escape_router/route_signal]: Escape routing dout0[7] with scale 5
*** Maze routing pins: 37.8 seconds
[router_tech/__init__]: Minimum track width: 0.680
[router_tech/__init__]: Minimum track space: 0.300
[router_tech/__init__]: Minimum track wire width: 0.380
[supply_tree_router/route]: Running supply router on vdd and gnd...
[grid/__init__]: BBOX coords: ll=v[-42.14,-25.13] ur=v[173.18,125.72000000000001]
[grid/__init__]: BBOX grids: ll=v3d[-62, -37, 0.0] ur=v3d[255, 185, 0.0]
**** Retrieving pins: 0.0 seconds
**** Analyzing pins: 0.1 seconds
[router/find_blockages]: Finding blockages.
**** Finding blockages: 1.2 seconds
[router/convert_blockages]: Converting blockages.
**** Converting blockages: 0.1 seconds
**** Converting pins: 1.4 seconds
**** Separating adjacent pins: 2.1 seconds
*** Finding pins and blockages: 8.3 seconds
[grid/__init__]: BBOX coords: ll=v[-45.75,-28.75] ur=v[176.99,129.39000000000001]
[grid/__init__]: BBOX grids: ll=v3d[-67, -42, 0.0] ur=v3d[260, 190, 0.0]
[grid/__init__]: BBOX coords: ll=v[-49.15,-32.15] ur=v[180.39000000000001,132.79]
[grid/__init__]: BBOX grids: ll=v3d[-72, -47, 0.0] ur=v3d[265, 195, 0.0]
[supply_tree_router/route_pins]: Routing vdd with 144 pins.
[supply_tree_router/route_pins]: 0 supply segments routed, 143 remaining.
[supply_tree_router/route_pins]: 25 supply segments routed, 118 remaining.
[supply_tree_router/route_pins]: 50 supply segments routed, 93 remaining.
[supply_tree_router/route_pins]: 75 supply segments routed, 68 remaining.
[supply_tree_router/route_pins]: 100 supply segments routed, 43 remaining.
[supply_tree_router/route_pins]: 125 supply segments routed, 18 remaining.
[supply_tree_router/route_pins]: Routing gnd with 50 pins.
[supply_tree_router/route_pins]: 0 supply segments routed, 49 remaining.
[supply_tree_router/route_pins]: 25 supply segments routed, 24 remaining.
*** Maze routing supplies: 86.7 seconds
** Routing: 161.5 seconds
ERROR: file magic.py: line 236: Unable to find the total error line in Magic output.
Ming Hung Chen
05/19/2022, 10:07 PMMing Hung Chen
05/19/2022, 10:12 PMmake mount
in docker folder. It displays name is not found.
[kevinchen@instance-627class macros]$ make mount
docker run -it -v /home/kevinchen/OpenRAM:/openram \
-v /home/kevinchen/OpenRAM/sky130A:/home/kevinchen/OpenRAM/sky130A \
-e PDK_ROOT=/home/kevinchen/OpenRAM \
-e OPENRAM_HOME=/openram/compiler \
-e OPENRAM_TECH=/openram/technology \
--user 1016:1017 \
vlsida/openram-ubuntu:latest
groups: cannot find name for group ID 1017
Matthew Guthaus
05/19/2022, 10:25 PMMatthew Guthaus
05/19/2022, 10:25 PMMatthew Guthaus
05/19/2022, 10:26 PMMing Hung Chen
05/19/2022, 10:38 PMMatthew Guthaus
05/19/2022, 11:01 PMMatthew Guthaus
05/19/2022, 11:17 PMMing Hung Chen
05/19/2022, 11:18 PMid kevinchen
and it displays
uid=1016(kevinchen) gid=1017(kevinchen) groups=1017(kevinchen),4(adm),39(video),1000(google-sudoers),995(docker)
Ming Hung Chen
05/19/2022, 11:20 PMdocker run \
--network host -it --rm \
-e PDK_ROOT=/shared/OpenLane/pdks \
-v /home/$USER/OpenFASOC/:/shared/OpenFASOC/ \
-v /home/$USER/OpenLane/:/shared/OpenLane/ \
-w /shared/OpenFASOC/openfasoc/generators/test-gen \
efabless/openlane:current
Ming Hung Chen
05/19/2022, 11:21 PMMatthew Guthaus
05/19/2022, 11:21 PMMing Hung Chen
05/19/2022, 11:21 PMMatthew Guthaus
05/19/2022, 11:22 PMMatthew Guthaus
05/19/2022, 11:22 PMMing Hung Chen
05/19/2022, 11:24 PMMing Hung Chen
05/19/2022, 11:24 PMMatthew Guthaus
05/19/2022, 11:30 PMMatthew Guthaus
05/19/2022, 11:31 PMMing Hung Chen
05/19/2022, 11:38 PMmake mount
with
docker run -it -v $(TOP_DIR):/openram \
-v $(SKY130_PDK):$(SKY130_PDK) \
-e PDK_ROOT=$(PDK_ROOT) \
-e OPENRAM_HOME=/openram/compiler \
-e OPENRAM_TECH=/openram/technology \
--user $(UID):$(GID) \
-v /etc/passwd:/etc/passwd:ro -v /etc/group:/etc/group:ro \
vlsida/openram-ubuntu:latest
Ming Hung Chen
05/19/2022, 11:43 PM[supply_tree_router/route_pins]: Routing vdd with 144 pins.
[supply_tree_router/route_pins]: 0 supply segments routed, 143 remaining.
[supply_tree_router/route_pins]: 25 supply segments routed, 118 remaining.
[supply_tree_router/route_pins]: 50 supply segments routed, 93 remaining.
[supply_tree_router/route_pins]: 75 supply segments routed, 68 remaining.
[supply_tree_router/route_pins]: 100 supply segments routed, 43 remaining.
[supply_tree_router/route_pins]: 125 supply segments routed, 18 remaining.
[supply_tree_router/route_pins]: Routing gnd with 50 pins.
[supply_tree_router/route_pins]: 0 supply segments routed, 49 remaining.
[supply_tree_router/route_pins]: 25 supply segments routed, 24 remaining.
*** Maze routing supplies: 87.4 seconds
** Routing: 161.7 seconds
ERROR: file magic.py: line 236: Unable to find the total error line in Magic output.
Traceback (most recent call last):
File "/openram/compiler/openram.py", line 77, in <module>
s = sram(name=OPTS.output_name,
File "/openram/compiler/sram/sram.py", line 50, in __init__
self.s.create_layout()
File "/openram/compiler/sram/sram_base.py", line 231, in create_layout
self.DRC_LVS(final_verification=OPTS.route_supplies, force_check=OPTS.check_lvsdrc)
File "/openram/compiler/base/hierarchy_design.py", line 70, in DRC_LVS
self.drc_errors = verify.run_drc(self.cell_name, tempgds, tempspice, extract=True, final_verification=final_verification)
File "/openram/compiler/verify/magic.py", line 236, in run_drc
debug.error("Unable to find the total error line in Magic output.", 1)
File "/openram/compiler/debug.py", line 47, in error
assert return_value == 0
AssertionError
make[1]: *** [sky130_sram_tiny.ok] Error 1
make: *** [sky130_sram_tiny] Error 2
Matthew Guthaus
05/19/2022, 11:57 PMMatthew Guthaus
05/19/2022, 11:58 PMMing Hung Chen
05/20/2022, 12:01 AMMatthew Guthaus
05/20/2022, 12:11 AMMing Hung Chen
05/20/2022, 1:46 AMMing Hung Chen
05/20/2022, 1:49 AMword_size = 32 # Bits
num_words = 2048
human_byte_size = "{:.0f}kbytes".format((word_size * num_words)/1024/8)
# Allow byte writes
write_size = 8 # Bits
# Single port
num_rw_ports = 1
num_r_ports = 0
num_w_ports = 0
ports_human = '1rw'
Matthew Guthaus
05/20/2022, 2:06 AMMatthew Guthaus
05/20/2022, 2:06 AMMing Hung Chen
05/20/2022, 2:40 AMMatthew Guthaus
05/20/2022, 3:50 AMMing Hung Chen
05/20/2022, 3:52 AMsky130_sram_tiny.drc.err
. I think it might because the magic version is not outdated in the docker image.
Error: Magic version 8.3.277 is required by this techfile, but this version of magic is 8.3.211.
Ming Hung Chen
05/20/2022, 3:53 AMMatthew Guthaus
05/20/2022, 4:05 AMMatthew Guthaus
05/20/2022, 4:06 AMMatthew Guthaus
05/20/2022, 4:07 AM