@Matt Liberty In MPW-5: PDN scripts called separately for each power and offset between the power are computed at openlane scripts. Where as In MPW-6, Look like single PDN scripts generate complete 8 power ring. Is Start and Offset between each power computation are aligned as in MPW-5 ? My MPW-6 Pre-check run's has XOR failure in user core ring and failure are related to power-ring offset.

The new pdngen will generate a correct set of rings but not necessarily identical to the old pdngen. Are you saying they are invalid in some way or just different?

@Matt Liberty MPW Pre-check XOR expect User project each Power Ring Location and offset should be aligned with golden reference GDS file (Golden reference file created by efabless team and is common in all the MPW shuttle) . I see there is some shift in power-ring which is creating XOR failure at user project.

Can you open an issue with the relevant data?

@Matt Liberty I am using the latest openlane (tag: 2022.05.18_02.12.32) and openroad toolset and building docker locally. Openlane Git Log:

commit 0dc6fb79c91082b94f8ded78d70f8bacbab96bf2 (HEAD -> master, tag: 2022.05.18_02.12.32, origin/master, origin/HEAD)
Author: Anton Blanchard <anton@linux.ibm.com>
Date:   Wed May 18 01:24:25 2022 +1000

Openroad Git Log:

commit 083c7d9c56275e9e5f18d8786b087789d864a6ce
Merge: 4f9e21b49 d1d629e84
Author: arlpetergadfort <46405338+arlpetergadfort@users.noreply.github.com>
Date:   Tue May 17 22:49:36 2022 -0400

    Merge pull request #1873 from The-OpenROAD-Project-staging/pdn-nets
    
    pdn: add -nets option to limit straps and rings to a subset of nets

So this is not for mpw-6 but just testing of the current tool?

@Matt Liberty yes, i am trying to use the latest tools set in my MPW-6 project tapeout.

FP_PDN_CORE_RING_VOFFSET / FP_PDN_CORE_RING_HOFFSET ?

@Matt Liberty After changing both H/V core offset from 14 to 12.45; both MPW Pre-check and Tape-out check are passed. Not sure real reason for this drift in new PDN flow. One more observation is: In previous PDN power ring order was <vssa2><vdda2><vssa1><vdda1><vssd2><vccd2><vssd1><vccd1> i.e alternative ground and vdd Where as in new PDN ring order is <vssa2><vssa1><vssd2><vdda2><vdda2><vccd2><vssd1><vccd1>, i,e secondary ground, secondary vdd, Primary gnd and vcc. I am not sure if this change in power ring order can create real issue during caravel power hook to user. As final tape-out flow only pick the user gds and will not have information on power net names during integration. Also there is no combined LVS for caravel + user area GDS. I feel inter-change in power hook will not be detected any of current tape-out check and may be observed only during user silicon bring-up ? @jeffdi @Tim Edwards do you see in issue due to change in user project power ring order ?

The building of the secondary power list starts here https://github.com/The-OpenROAD-Project/OpenLane/blob/0dc6fb79c91082b94f8ded78d70f8bacbab96bf2/scripts/openroad/pdn_cfg.tcl#L54 - you can build the list in whatever order makes sense.

Ok, I need to customize the power order inside pdn_cfg.tcl; Let me try it. Just for cation, any users using default pdn_cfg.tcl may not notice this change in power-ring order in new PDN flow and I am afraid this will not be detected by any current tapeout checks ?

Given that most users are caravel users I think you should PR your change if it works well. I made the edits without any insight into the problems you are seeing. It would be good if there was a test for this in OL

@Matt Liberty I am not sure get this changes integrated in openroad repo. I have attached the modified pdn_cfg.tcl file to make sure than power ring order same as in previous MPW shuttle. With this changes the MPW precheck and tapeout checks are also clean. Note: One more change to fix Pre-check XOR , Added FP_PDN_CORE_RING_HSPACING / FP_PDN_CORE_RING_VSPACING config value from 14 to 12.45 FYI: I have just changed the foreach loop logic

Are you familiar with how to make a pull request? That's the mechanism for requesting changes : https://docs.github.com/en/pull-requests/collaborating-with-pull-requests/proposing-changes-to-your-work-with-pull-requests/creating-a-pull-request

Let me try this time ..

@Dinesh A @Matt Liberty did you encounter the IO pins also shifted? I recently re-run my design with OL (cb59d1f84deb5cedbb5b0a3e3f3b4129a967c988) used for resubmit mpw7 and see both power rings and pins are shifted. Changing the `FP_PDN_CORE_RING_HOFFSET`and

FP_PDN_CORE_RING_VOFFSET

to 12.45 only help aligning the power rings but not the IO pins. As a result, precheck flags XOR errors. Any idea or suggestion? Thanks

@NguyenDao Are you using latest IO user project wrapper def file? fixed_dont_change/user_project_wrapper.def My understanding there was some update in MPW7

It is defined in the example config.json as default for sky130*, but the power rings were shifted. Changed the value of

FP_PDN_CORE_RING_VOFFSET

and

FP_PDN_CORE_RING_HOFFSET

in .json seems does not take any effect (only see the default values in config.tcl under runs directory). I will try again with the config.tcl with

FP_DEF_TEMPLATE

. Thanks