Hi guys - I see there’s been a very detailed thread here on bring-up & management-SoC programming, primarily from @User & @User. Thanks for all of this. Is there some distillation - maybe a document or similar - of what you found, and what should work for other board-users?

After tapeout, we found timing issues and managed to solve them inside the SoC with a metal mask fix that didn't disrupt the ongoing manufacture. Supposedly, timing analysis said there were no issues outside of the SoC, but there is in fact some timing violation in the serial loader that configures GPIO 0 to 18. A bit of investigation managed to pin that down to a simple hold violation between GPIO blocks, and by modeling the error, I was able to figure out how to account for that by shifting bits in the configuration words before running the serial load. The error limits the ways in which the pins can be configured for management-side use, but doesn't cause any problems for user-side use, and all the major management-side functions like running the housekeeping SPI, the SPI master, and the UART are working. Figuring out the configuration bits by hand is painful, so I wrote a little python script which converts a set of configuration values into the values that need to be put into the C file to make the configuration come up the way that it was intended. That script was posted in my thread with Weston. I can also post an example C program, on request.

OK - I take it the script you’re referring to is this: https://skywater-pdk.slack.com/archives/C022XAPHD9C/p1644179053625569?thread_ts=1643830827.355289&cid=C022XAPHD9C We do not have existing management-SoC C-code, nor IO configuration code. If there’s a sample worth posting or linking to, that’d be quite helpful. And does the (seemingly alternate) header-file here: https://github.com/efabless/caravel_board/blob/main/firmware/defs_mpw-two-mfix.h Comprehend all of these changes?