one of the vdd and vccd pins is incorrectly labele...
# silicon-validation
a
one of the vdd and vccd pins is incorrectly labeled
m
Yes this looks like pin 29
t
Both pins 28 and 29.
m
Really? The image doesn't look like 28 is routed to vccd
It looks like the four right most pins
t
@Matthew Guthaus: Look closely---there is a double bond. The four rightmost pads on the chip connect to the three rightmost pins on the package. The next two pins to the left are 28 and 29. The error with those is inside the I/O wrapper cell layout, so you won't see the issue from the diagram. The cells have the wrong wrapper, which connects them to the VDD1V8 rail instead of the VDD3V3 rail, so they are actually 1.8V supplies, not 3.3V supplies. The SRAM core runs on 1.8V anyway, so it's actually better to have additional 1.8V pads rather than 3.3V pads. The problem was worse on the StriVe chips, because the incorrect pad was tied to other 3.3V supplies internally, which just shorted the supplies together everywhere. These pads on the OpenRAM test chip aren't connected to anything internally other than the padframe power rings, so the only real impact is that the documentation is wrong, and just changing the name on package pins 28 and 29 fixes the issue.