Hey, I was designing my own IO cell. I realized that I am missing the ESD circuitry. I wanted to use one from gpiov2 but it seems that localesd is used, and I don't fully understand what it does: 1. I can see in gpiov2 docs that it is supposed to be a two diodes, but it does not seem that NMOS is connected in diode mode (Source and gate shorted to pin1 and drain connected to pin2) 2. Why is gate floating? Is it connected to something, because I don't see any connections 3. and it seems strange to me that for ground VSSD is used instead of much logical VSSIO? From my understanding in case of ESD event VDDIO and VSSIO is shorted together to protect from the charge, but if the PAD is dioded to VSSD and VDDIO_Q does not it mean that this will not do anything? 4. And is VDDIO_Q supposed to be used for ESD? 5. Is this circuit tested in field? Can I just use it as-is in my own circuit? 6. Is my understanding of where pad connects correct? UPD: 1 and 2. nevermind the gate is connected to VSSD it seems for bottom one, but 7. gate is also connected to VSSD and the top Drain (or maybe source) to NBODY? One more thing I don't understand: How to integrate my IO cell with caravel? Do I just place my cells in top level GDS? My cells are designed in a way so that I can connect them to NOESD pad of GPIOv2, so it can be used with Caravel too, should I stick with caravel because it implements ESD?

You cannot create your own I/O cell, because the padframe in caravel and caravan is fixed, but you can (and should) create your own ESD protection circuitry to connect to the bare pads along the top row of caravan.

That answer was really useful, thanks a lot!