Hi all, I have a question about programming a core in the user space. If I implement an SoC in the user area, how do I go about programming it? Currently, I have a working FPGA implementation of a PULPissimo variant (a RISCV based SoC), and I'm using GDB to load the binaries into the program memory directly through JTAG. Can I implement the same functionality on caravel using the PAD pins? Or do I first need to load the binaries using the management core into a flash memory thru SPI, and then copy the contents of this flash into the program memory of the PULPissimo? Is there any tutorial/example project that implements this flow? I'd greatly appreciate any pointers about this! I'm sorry if this was not the correct channel to ask this question.

1. See below 2. Yes you can use jtag pins to program your user project, as long as the pins are broken out in top level to IC's pads 3. You need to use the mgmt soc to configure the pins, so you need to program on board flash first 4. your user project can access pins of flash and can either load the content into ram or execute in place, its up to implementation of your user project

@User please see the firmware examples in this repo https://github.com/efabless/caravel_board

Thank you for the help! Arman, could you please elaborate bullet #3? If I use JTAG to program my user project, isn't it completely independent from the mgmt area/soc?

I dont know about recent versions of Caravel, but for older ones, the mgmt soc flash has to be programmed (should be fairly simple) with formware that configures I/O, see the link above