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I want to integrate a logo into the `Caravel` user...
# caravel
h
I want to integrate a logo into the 
Caravel
user area, does someone know how I can integrate a layout macro w/o a Verilog file. (I want to avoid inserting it by hand, would be cool if this somehow would be possible automatically)
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👀 1
a
1. make lef 2. make blackbox verilog 3. put blackbox verilog into your rtl 4. do openlane, use manual macro placement example. Copy the instance name from synthesis netliat to be sure it's correct. 5. Ru openlane w/ extra lefs and extra gds parameters set accordingly
To make lef use vsdmixedflow example. This can be done with magic, just make sure you call makeports.
you man need to add dummy pins so it's not optimized away
m
@User have you tried this?
I've never had it work, lvs always fails.
a
Yes. Only catch: power need to be connected manually. I do this by having an interactive script and after the flow is complete, but before the LVS is done I insert the power pins. For the vsdmixedflow, you dont need to manually connect power, since it connects to power rails
IDK if power for macros can be connected with pdn.tcl
m
Can you post an example?
a
Unfortunately not right now. I will post it as soon as possible. Might take a couple of weeks.
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Also much simpler variant was suggested to me. Use routing blockages and then add the power connections manually in the final GDS.
h
Good idea, need to decide whether I go for blockage or a blackboxed Verilog…
a
you need both.
You still need the LEF and blackbox verilog. Without it the flow wont know where to connect. But you leave power pins disconnected and dont do lvs. Then you modify the gds with the power connections. And then do lvs.
where to connect to your cell.
h
OK, then I know what to do, thanks!
🎉 1
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