Does anybody know how to fix this? {{STEP UPDATE}...
# shuttle-precheck
a
Does anybody know how to fix this? {{STEP UPDATE}} Executing Check 11 of 13: Klayout Metal Minimum Clear Area Density STDOUT: Total # of DRC violations is 17 Please check armleo_gpio_mpw5/jobs/mpw_precheck/41724b09-a75e-4af2-ad50-0d03a083324b/outputs/reports/klayout_met_min_ca_density_check.xml For more details From other thread I know that this is caused by li1 being too full. But the ploblem is, that I don't know how to fix it. My design consists of 80% of fillers and 20% of useful cells. The fillers are causing this. But I cant just remove it, right?
m
we've seen this quite a few times on this shuttle run. I think the best bet is to reduce the size of your design so it's not 80% filler
a
I am currently thinking about using EF provided decap, by replacing it in GDS. LVS seems to match
j
@User you might try rehardening with this in your config.tcl
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set ::env(DECAP_CELL) "\
	sky130_fd_sc_hd__decap_3 \
	sky130_fd_sc_hd__decap_4 \
	sky130_fd_sc_hd__decap_6 \
	sky130_fd_sc_hd__decap_8 \
	sky130_ef_sc_hd__decap_12"
this will substitute the size 12 decap with an EF version with less LI.
a
This causes the magic as part of openlane to error out. Didn't want to bother, most likeley it wasnt properly configured by me. I just replaced the decap12 in final GDS with ef provided one. It fixed the issue
j
great.
@User any ideas on why magic would hit an error using the EF decap cell?
t
@User: I looked into this once and what I recall was that the LEF (or maglef) view of the cell did not match the other cells in the library in the way that it treats the power supply on local interconnect, leading to "illegal overlap" errors. But I don't think the current version of the cell has this issue, so it could be a version problem. Originally, you fixed the problems manually by replacing the cells in the GDS directly, which bypassed any checks in magic, so the issue didn't come up until people started synthesizing with the EF versions of the decaps.
m
@User
@User can you give details about how to do the replacement in final GDS?
a
1. Open klayout 2. Open the gds for the sky hd stdcell library 3. Open the ef decap 12 4. Open the gds of your layout and open the layout of sky's decap 5. Delete content of the sky's decap 6. Copy the content of ef's decap in place It passes lvs since the actual transistor sizes are the same, only difference - less li1 connected to poly. It also does not have problem with origin/overlapping with other cells, since klayout preserves the origin of the copy pasted cell.
👍 2
m
Thanks Arman!
a
@User I will try using latest versions for next mpw6. If I have any issues again, I will provide the reproduction materials.
q
After setting
DECAP_CELL
per the above for my user_project_wrapper, when hardening netgen gets stuck for over two hours:
Copy code
Circuit was modified by parallel/series device merging.
New circuit summary:

Contents of circuit 1:  Circuit: 'user_project_wrapper'
Circuit user_project_wrapper contains 514170 device instances.
  Class: sky130_fd_sc_hd__clkbuf_16 instances:   2
  Class: sky130_fd_sc_hd__buf_2 instances:  34
  Class: sky130_fd_sc_hd__buf_6 instances:   2
  Class: sky130_fd_sc_hd__buf_8 instances:   2
  Class: sky130_ef_sc_hd__decap_12 instances: 513188
  Class: mkQF100Fabric         instances:   1
  Class: sky130_fd_sc_hd__inv_8 instances:   1
  Class: sky130_fd_sc_hd__clkbuf_2 instances:  10
  Class: sky130_fd_sc_hd__clkbuf_8 instances:   1
  Class: sky130_fd_sc_hd__conb_1 instances: 206
  Class: sky130_fd_sc_hd__buf_12 instances:  44
  Class: sky130_fd_sc_hd__decap_3 instances:   1
  Class: sky130_fd_sc_hd__decap_4 instances:   1
  Class: sky130_fd_sc_hd__decap_6 instances:   1
  Class: sky130_fd_sc_hd__decap_8 instances:   1
  Class: sky130_fd_sc_hd__and2_4 instances:   4
  Class: mkLanaiCPU            instances:   1
  Class: sky130_fd_sc_hd__inv_12 instances:   2
  Class: mkQF100GPIO           instances:   1
  Class: mkQF100SPI            instances:   1
  Class: sky130_fd_sc_hd__diode_2 instances: 648
  Class: sky130_fd_sc_hd__tapvpwrvgnd_1 instances:   1
  Class: sky130_fd_sc_hd__fill_1 instances:   1
  Class: sky130_fd_sc_hd__fill_2 instances:   1
  Class: mkQF100Memory         instances:   1
  Class: sky130_fd_sc_hd__clkinv_16 instances:  14
Circuit contains 1139 nets, and 384 disconnected pins.
Contents of circuit 2:  Circuit: 'user_project_wrapper'
Circuit user_project_wrapper contains 514170 device instances.
  Class: sky130_fd_sc_hd__clkbuf_16 instances:   2
  Class: sky130_fd_sc_hd__buf_2 instances:  34
  Class: sky130_fd_sc_hd__buf_6 instances:   2
  Class: sky130_fd_sc_hd__buf_8 instances:   2
  Class: sky130_ef_sc_hd__decap_12 instances: 513188
  Class: mkQF100Fabric         instances:   1
  Class: sky130_fd_sc_hd__inv_8 instances:   1
  Class: sky130_fd_sc_hd__clkbuf_2 instances:  10
  Class: sky130_fd_sc_hd__clkbuf_8 instances:   1
  Class: sky130_fd_sc_hd__conb_1 instances: 206
  Class: sky130_fd_sc_hd__buf_12 instances:  44
  Class: sky130_fd_sc_hd__decap_3 instances:   1
  Class: sky130_fd_sc_hd__decap_4 instances:   1
  Class: sky130_fd_sc_hd__decap_6 instances:   1
  Class: sky130_fd_sc_hd__decap_8 instances:   1
  Class: sky130_fd_sc_hd__and2_4 instances:   4
  Class: mkLanaiCPU            instances:   1
  Class: sky130_fd_sc_hd__inv_12 instances:   2
  Class: mkQF100GPIO           instances:   1
  Class: mkQF100SPI            instances:   1
  Class: sky130_fd_sc_hd__diode_2 instances: 648
  Class: sky130_fd_sc_hd__tapvpwrvgnd_1 instances:   1
  Class: sky130_fd_sc_hd__fill_1 instances:   1
  Class: sky130_fd_sc_hd__fill_2 instances:   1
  Class: mkQF100Memory         instances:   1
  Class: sky130_fd_sc_hd__clkinv_16 instances:  14
Circuit contains 1139 nets, and 384 disconnected pins.

Circuit 1 contains 514170 devices, Circuit 2 contains 514170 devices.
Circuit 1 contains 1139 nets,    Circuit 2 contains 1139 nets.

Circuits match with 4 symmetries.
Resolving automorphisms by property value.
Resolving automorphisms by pin name.
Netlists match with 1 symmetry.
Maybe it's because
sky130A/libs.tech/netgen/sky130A_setup.tcl
doesn't make the
_ef_
decap cells get processed in parallel?
Yep, changing the regexes to match helped.
a
g
I run into the "Klayout Metal Minimum Clear Area Density" issue with mpw-6c. It seems there was a PR (https://github.com/RTimothyEdwards/open_pdks/pull/212/files) for fixing the problem. Is this included on mpw-6c or do we need to make the manual change listed above?