Hi <@U016EM8L91B>, <@U016HSALFAN>, I see that this...
# shuttled
drr
11/16/2020, 6:51 AMHi @User, @User, I see that this README file in Caravel says that the only GPIO configurable as an output is`mprj_io[6]`. Was there any change since then to support outputs on the other pins or is it still as the README diagram shows? It seems to be allowed by the sim model when the CPU various pins as an output but after reviewing the doc again, apparently it shouldn't be. Does the sim or README need updating?
https://github.com/efabless/caravel/blob/release/verilog/rtl/README#L185
drr
11/16/2020, 6:52 AMexcuse the typo: ...when the CPU congirures various pins as an output
drr
11/16/2020, 7:18 AMRealized that's a default-powerup-config description rather than a limitation on what IOs can serve as input or output (which I'd find very odd, hence the question). Should have double checked the title of the section before asking, please disregard
t
tnt
11/16/2020, 10:20 AMI can confirm at least I got those same errors. Layer 236 is just documentation AFAICT.
tnt
11/16/2020, 10:21 AM(ignore response above ... wrong thread ...)