I wanted to summarize a few outstanding issues for the shuttle with OpenLane relating to SRAM integration. 1. We need to have a mechanism to use the LEF file for SRAMs during final DRC because SRAMs use core memory rules. This could be the SRAM LEF file or it could be the core cell LEF files. There are, however, a large number of core cells in the sky130_fd_bd_sram library that would need to be used. It is simpler to do the entire SRAM. The SRAMs will be passing DRC with the core cells replaced only as output from OpenRAM (with maybe a hand tweak here or there if it crops up in the supplies). 2. We need to make a precheck step to confirm that users have the latest version of the SRAMs in sky130_sram_macros since they are being updated frequently. I met with @User the other day and wanted to bring this to @User and @User attention.

It will be great to have this more integrated into the flow

@Matthew Guthaus we are working on an update to precheck to address both of these items. hope to post something shortly.