I have started looking at improving the multi project tools for MPW3. Current ideas include: • 1kb SRAM • support different project sizes • optional wishbone • Automatic FPGA bitstream creation for testing groups of designs on the icebreaker FPGA https://docs.google.com/document/d/1FM2ETW70EMXpwIMmjO7sIhuT_zpv9lugnDj3JV5Qjlg/edit#heading=h.7w4xk932k3kp

Better IO cells