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I've been getting the following message when harde...
# shuttle
b
I've been getting the following message when hardening user_project_wrapper: 
Result: The top level cell failed pin matching.
vccd1 and vssd1 pins are not being connected.
Here's the link to my repo: https://github.com/BrandonOng22/caravel_user_project.git. I'm in the flash branch
m
can you post a picture of the user project wrapper gds that shows the PDN over your macro?
some people have been having problems with the PDN shorting which leads to LVS issues
b
Screen Shot 2021-12-27 at 5.36.24 PM.png
m
normally I see more of a frame around the macros with the pins around the edge.
is the vertical met4 line getting interrupted by the macro or does it continue through it? I can't tell
here's an example
image.png
see the vertical met4 of the pdn, is interrupted for the macro
b
I see what you mean, the m4 line continues through
m
I think this is a problem with the caravel repository
b
I tried changing both caravel and openlane to mpw-3 and it still didn't work. I think I'm getting a different error: 
(no matching pin)                          |vccd1
The other thread's problem is mismatched pins, mine looks like there isn't a pin connected at all
m
if you have shorts, then the output of the lvs check could be either
also, you definitely want to be on mpw-3a of openlane
that has the fixes for the setup/hold problems affecting mpw1 and 2
b
I was on mpw3-a originally, so I'll switch back
m
try this version of the caravel submodule
5712871d27c08900d18edc72a7f534cc8be1b2dd
b
Unfortunately that version didn't change anything
m
If you can find the extraction log, it might indicate that you have a short. Look for messages like
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Warning:  Ports "vccd1" and "vssd1" are electrically shorted.
m
@User I've just setup a github repo that uses github actions to install the version of the tools I'm using: https://github.com/mattvenn/project0_test
b
Thanks @User . I tried using your tools but the problem still persists
m
If I get time I'll try here
Pls make sure your GitHub repo is up to date with your local files
b
Thank you. I've updated the flash branch of my repo
m
I don't know why there is no cutout on PDN for your design
maybe becaus it's so small?
anyway, I moved it to the left by 23 microns so it fits in the gap
but there are still lvs issue
image.png
but I wonder if that's actually something up with your design
b
I'm not sure what could be causing that. I have simulated this on my own. I did hand design my macro using layers that aren't typically used in std cells, so I wonder if that is causing any problems
Thanks for taking a look
m
maybe ask in the #analog-design channel for feedback on the gds of the flash macro?
m
What version of magic is everyone using? There were recently some changes to substrate extraction.
b
@User I'm using magic version 8.3.209
m
I'm on 8.3.253. Do you know how to update?
b
I'll try updating
Unfortunately I get the same result
m
@User cloned your repo. Is the repo up to date? What branch are you using?
b
I just updated the repo. I'm on the 'flash' branch. The bug I'm trying to figure out is why GND and PSUB are shorted together
Thanks for taking a look
m
Is this the right file?
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bash-4.2$ cksum ../gds/flash_array_8x8.gds 
1430410556 39954 ../gds/flash_array_8x8.gds
From your screenshot, it looks like you're extracting 
user_project_wrapper
, but the this file does not contain 
flash_array_8x8
.
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bash-4.2$ cksum ../gds/user_project_wrapper.gds 
3200867709 9776126 ../gds/user_project_wrapper.gds
b
Since it exits after an error, user_project_wrapper isn't edited in the gds folder. I've been looking at the following file: 
caravel_user_project/openlane/user_project_wrapper_runs/user_project_wrapper/results/klayout/user_project_wrapper.gds
m
Ok, I'll try to run openlane to recreate it then.
I get the following
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Error: sta.tcl, 128 can't read "::env(CLOCK_PORT)": no such variable
which may be caused by a newer (or older) version of openroad. No clocks in your design, right?
b
Right, no clocks
I'm on the mpw-3a tag of open lane
m
Can you manually copy 
caravel_user_project/openlane/user_project_wrapper_runs/user_project_wrapper/results/klayout/user_project_wrapper.gds
to 
caravel_user_project/gds/user_project_wrapper.gds
, compress, and push to the repo?
b
I just pushed. fyi I also changed the name of PSUB to VBPW
m
With magic 8.3.255 extraction, I get several of the following messages.
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box 230480 336398 230686 336424
feedback add "Illegal overlap between nwell and pwell (types do not connect)" medium
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