@Matthew Guthaus: I am painfully aware of this issue. I do not know who implemented "extresist" (many years ago), but the choice of using the ".sim" format to shuffle data around was a poor one. The ".sim" format is just being used as a way to get magic to flatten the circuit, dump information about nodes and devices, and then read that information back. Then that information is folded into the existing SPICE netlist, and rewritten as a new SPICE netlist annotated with the additional resistors. It's kludgy as all get-out. My observation is that all the data that extresist uses from the .sim file is already available in the .ext file after "extract all", and in fact the .ext files contain more and better data (such as substrate connections). My current plan is that some time in the near future I will rip the dependency on the .sim format out and replace it with a routine that reads back the node and device information from the .ext files. The entire process of generating an R-C netlist would then be, e.g., just "extract all", "extresist tolerance 10", "ext2spice extresist on", "ext2spice". Probably I would then have an "ext2spice rcx" similar to "ext2spice lvs", that would set up and execute ext2spice with options appropriate for typical full R-C extraction.