@User I have just discovered that the g5v0d10v5 nmos and pmos have slightly different spacings from the channel to the gate contact. Is there any reason for this? I am working on modifying it through the dictionary passed to the device generate function and I have not caused any DRC errors yet
Weston Braun
05/10/2021, 10:44 PM
Oh wait, no, I was playing with the wrong generator. Still figuring out if I can modify this....