If we extract the circuits hierarchically (cap only), is the extracted c in subcell netlist represents only the li layer parasitic in the that cell? (I am using stdcells, so only li and poly used?)

You'll get parasitic C values for any layer that has an area and fringe capacitance defined in the parasitic extraction definitions in the magic techfile. That will include li, poly, and well, as well as inter-layer capacitances between any of those layers and any other, or between themselves. Only transistor gates and source/drain are not extracted as parasitics because they are included in the device model. As far as the hierarchy: Magic will write the parasitic capacitance for just the cell by itself, and the parasitic capacitance for the parent cell, by itself. Then if there is any redundant overlap, it will add a negative capacitance equal to the amount of overlap to compensate for the duplicate counting of the caps.

@Tim Edwards Thanks for the detailed explanation. SO, then if I delete the parasitic definition in the extracted subcell netlist, I will have an extracted netlist of the top level routing/connection/well parasitic of the circuits only.

Not sure. If you delete the parasitics out of the subcell, then the compensating negative capacitances in the parent cell might make the total capacitance come out to be negative.

Thanks for the reply! @Tim Edwards Ok...Then my question would be: how about delete the extraction cap in the top cell. Would that give me a pex netlist of only the subcell (stdcell) parasitic? Is it reliable to do so? I am curious to find out the difference between the contribution to digital VCO frequency offset from 1) stdcell parasitic 2) metal routing/interconnection parasitic. Or can we instruct magic to include/exclude certain layers during extraction? (I didn't see any functions imply this in

extract

and

ext2spice

and I don't think it is something people would expect for the extraction tools, so it is just out of curiosity :D

Yes, you should be able to remove all the capacitance entries from the top-level .ext file and then run ext2spice and get a result that has only the parasitics for the subcells. There is one capacitance per line for all lines beginning with "cap" or "subcap", so just deleting those from the top-level .ext file should be sufficient; then run "ext2spice" without doing "extract" and it should use the modified .ext file.

Got it, Thanks!😃