I ran into a problem when extracting the mimcap (sky130_fd_pr_cap_mim_m3_1). The extracted spice netlist has not only the capacitor with the right width and length, but also a virtual capacitor which has a 0 width and length and connects to an undefined port (null). Anyone know how to solve this?

x4 vout a_4381_n15091# sky130_fd_pr__cap_mim_m3_1 l=13.5u w=13.5u // correct netlist

x48 vout a_4318_n15091# (null) sky130_fd_pr__cap_mim_m3_1 l=0 w=0 // virtual cap and an unknown port (null)

Can you please post a simple layout that demonstrates the problem?

@Xiangyu Cao did you encounter this

This is the simple layout that I used, it produces a three terminal capacitor with the third port named "(null)", which makes no sense to me. I guess it might have something to do with the parasitic resistance extraction, because that is the only step that I would get an error. I get 'missing SD connection' and 'missing Gate connection' when doing 'extresist'. The command I used to extract the netlist is shown below @Tim Edwards:

box values 0 0 0 0

extract all

ext2sim label on

ext2sim

extresist toleracne 10

extresist

ext2spice scale off

ext2spice cthresh 0.01

ext2spice extresist on

ext2spice format ngspice

ext2spice -o /home/eda/magic/test/cap_test.spice

@Hongzhe Jiang: Oh, this is from extresist. Currently, extresist doesn't support extraction of capacitors or diodes. Last month I added some code in preparation of adding this support but I have not finished that work. Basically what happens with the existing code is that if you have a capacitor, the bottom plate will not be seen by the extraction and ends up as the (null) entry in the output. The R-C extraction is probably then incomplete because it won't extract any resistances out to the capacitor bottom plate because it doesn't see it as connected to the capacitor. But changing the (null) entry to the correct node will give you a valid netlist.

Thanks for the explanation!