Hello everyone! Did someone here do inductance ext...
# magic
l
Hello everyone! Did someone here do inductance extraction in magic? Does it do it by default or do you need to habilitate it somehow?
t
Inductance extraction from geometry is a problem for 3D field equation solvers. The only meaningful way to handle them in magic is to use a pre-designed inductor with known properties that has an associated SPICE model. The layout can then be given a property that tells magic to extract the cell as a call to the model.
There are some hooks in magic (see the "extresist" command) to extract geometry into a format that can be used with FastHenry.
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l
Thanks for the answer! I'm looking into it now, and installing FastHenry is in the works right now. Also, if I may ask another question: is there a way to tell magic to treat transistors in a layout as being RF transistors? Extracting, say, sky130_fd_pr__rf_nfet_01v8_lvt_b instead of sky130_fd_pr__nfet_01v8_lvt
t
SkyWater does not have any RF-specific device models. There are RF layouts, which are presumably optimized for parasitics (although there was some question as to whether or not that was true). Those layouts can be found in the sky130_fd_pr library and all the cell names have "rf" in them. But the netlists for those device layouts still point to the standard device models.
l
Oh, I see... I intend to draw (and extract) a custom layout to compare to the RF cells, and I'm starting to get a grasp of how the programs access the files and etc. I'm still wrapping my head around parasitics extraction (specifically resistance), though :)
Actually... when I run ext2sim, magic does not create the .nodes and .al files. It simply completes ext2sim and tells nothing wrong. The layout I'm doing is this one: a 10-finger nmos. Did you run into this issue before?
t
For extresist you only need the ".nodes" file. For that, you want to run "ext2sim labels on" before you run "ext2sim".
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l
That solved it, thanks!
t
Just be aware that right now "extresist" will not extract capacitors, bipolars, or diodes (the issue being a device that has terminals in a different plane than the device identifying layer). It is an issue that I am currently working on fixing.
l
Thanks for the information. And congratulations on the awesome work!