< U016EM8L91B> Good morning I think that commit 15f081b4da8b open-source-silicon.dev #magic

<@U016EM8L91B> Good morning. I think that commit 1...

Matthew Guthaus

11/03/2021, 3:27 PM

@User Good morning. I think that commit 15f081b4da8bfd2748d01cb517e2c8fd98ac42f3 of magic didn't fix the substrate pin issues. I have a simple inverter that now has its pwell disconnected and doesn't pass LVS. To reproduce, just run "./run_ext.sh" and then "./run_lvs.sh" for the LVS. The resultant extracted netlist is:

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.subckt pmos_m1_w1_600_sm1_dm1_da_p G D comment_n24_n24# w_n24_n24# S
M1000 D G S w_n24_n24# pfet w=1.6u l=0.4u
+  ad=0p pd=0u as=0p ps=0u
.ends

.subckt nmos_m1_w0_800_sm1_dm1_da_p G D comment_n24_n24# S
M1000 D G S w_n24_n24# nfet w=0.8u l=0.4u
+  ad=0p pd=0u as=0p ps=0u
.ends

.subckt pinv A Z vdd gnd
Xpmos_m1_w1_600_sm1_dm1_da_p_0 A Z comment_0_0# vdd vdd pmos_m1_w1_600_sm1_dm1_da_p
Xnmos_m1_w0_800_sm1_dm1_da_p_0 A Z comment_0_0# gnd nmos_m1_w0_800_sm1_dm1_da_p
.ends

Specifically, the net w_n24_n24# is not connected in the nmos subckt and there is no port in the nmos instantiation. It could have to do with each transistor being its own cell? I generate them like pcells so they have hierarchy. Note, this is not specific to sky130.

04_pinv_1x_test.tar.gz

Tim Edwards

11/03/2021, 3:48 PM

I will take a look.

Tim Edwards

11/03/2021, 5:41 PM

I think it's less a matter of "not fixed yet" than it is "broke something else in the process". The pwell under the nFET is local to the subcircuit but is not in the pin list---this is a substrate connection and is treated separately from other connections. I know where the code is that is supposed to be working.

Tim Edwards

11/03/2021, 9:46 PM

Looks like I'm in a tug-of-war between solutions that make the substrate a local node and miss making it a port connection, and solutions that always add a substrate port connection even when the substrate isn't used inside the cell. I fixed the above issue (revision 223) but it makes the other issue reappear (which is known to end up as an LVS problem). I have an idea of another way to solve the unneeded substrate connection, so I'll work on that.

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