Hey again. One thing I noticed recently is wheneve...
# magic
d
Hey again. One thing I noticed recently is whenever I extract a circuit (run
extract all
), it looks like no parasitic resistances are extracted. I am checking this by reading the resulting
.ext
file. Is there some additional setting I need to set? This happens in every example I have tested, but here I included my specific example. I open SSTL.mag, and run
select top cell; extract all
. Are there really no significant parasitic resistances in this design?
a
there is extra spets required. I think cthresh and rthresh is one of them. But for resistance extraction you also need extra steps
See: https://github.com/armleo/armleo_gpio/blob/main/scripts/magic_pex.tcl Particularly the commented section. Unfortunetly I don't know how to repair it, so it will correctly extract the resisotors. It might be as simple as uncommenting somethings, or not.
h
Here is a PEX script that can serve as reference. https://github.com/hpretl/iic-osic/blob/main/iic-pex.sh
t
@User: Using just "extract" will only extract parasitic capacitances (and "lumped" resistances, which, to my knowledge, no tool understands what to do with, although it's a pretty clever idea). Extracting resistances requires having magic annotate the extraction results. The sequence of commands goes like this:
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flatten cellname_flat
load cellname_flat
extract all
ext2sim labels on
ext2sim
extresist tolerance 10
extresist
ext2spice lvs
ext2spice cthresh 0
ext2spice extresist on
ext2spice
A couple of notes: (1)
extresist
does not work well with hierarchy. Your best bet is to flatten the circuit before running parasitic extraction. The
flatten cellname_flat
command flattens the loaded cell and places it into a new cell called
cellname_flat
. This will make the top level subcircuit in the output called `cellname_flat`; there are ways to work around that but probably not worth worrying about. (2) I always like to use
ext2spice lvs
even when not doing LVS because it sets "sane" configuration; then I redo some settings like the capacitance threshold, for parasitic extraction.
d
Thanks everyone! I gave Tim's script a shot and it basically worked. Here is the script I finally settled on:
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set NAME [cellname list self];
select top cell;
# (Flattening improves resistance extraction)
flatten "[list $NAME]_flat"
load "[list $NAME]_flat"
select top cell;
extract do resistance;
extract all;
ext2sim labels on;
ext2sim;
extresist tolerance 10;
extresist all;
ext2spice lvs;
ext2spice cthresh 0;
ext2spice extresist on;
ext2spice -o "pex_[list $NAME].spice";