Many intro VLSI classes create custom designs like...
# coursesm
Matthew Guthaus
08/12/2021, 4:11 PMMany intro VLSI classes create custom designs like an adder/multiplier/etc. and many analog classes do the same with an amplifier/a2d/etc. It would make sense to have a framework based on Caravel, kind of like what @User did with ASIC modules, to integrate these custom designs on a single user space. The main challenge as I see it would be the Design For Test automation so each project could test themselves. Also, a shared hardening flow for custom, of course.
What do people think?
@User how did you do DFT for your designs?
m
Matt Venn
08/13/2021, 2:21 PMeach project submitted had a set of unit tests that were run against the standalone project. Then each project also included a top level test that used the picorv32 to enable them and then run a test checking the outputs/inputs
👍 1
Matt Venn
08/13/2021, 2:21 PMall designs were tested that outputs were Z when not enabled
Matt Venn
08/13/2021, 2:22 PMall that got done automatically by the multi project tools and the ways the projects were structured
Matt Venn
08/13/2021, 2:22 PMa future idea for MPW3 is automatic bitstream generation to run a set of designs on an FPGA