Not really redesigned (it has the exact same layout) but the hierarchy was modified to include it in each one, yes.

Does this mean that potentially can be replaced by forward / reverse type of tap cell?

what's that ?

substrate biasing fot vt modulation

Potentially, yes. Like a deep sleep mode etc.

right!.. How about boosting read/write cycles, or its just too much capacitance to adjust dynamically? any thoughts?

Anything is possible :) It could be used for that too

So I see how you could bias the n-well differently than just VDD, at least put it higher (or maybe a bit lower but can't go too low or you'd have a conducting diode IIUC). But for the p-substrate ... huh, the whole chip has to be at the same potential right ? Or do you do a deep-n well, then put a p-well in that to make your nmos in, but that would make the cell larger, unless I'm missing something.

Amount of VT one can change with body bias is only in thr range of 100mV. The restriction comes due to the possibility of turning on of the parasitic diode. But then this device should be in its own N well ( for pmos) or a isolated p well (using deep n well) for nmos.

Yes, bulk CMOS requires that everything share a p-substrate with one bias.