I don't know what the m4 ones are showing
# openram
m
I don't know what the m4 ones are showing
m
This is our fault when adding a stripe
m
Ah. I have also seen that triton route is not spacing external wires far enough from the LEF blockages
It uses min wire rules, not wide spacing
m
We usually add a wrapper around the RAMs in other nodes. The wrapper scripts needs to be modified to work with openRAM. Are you aware of any wrapper in openlane?
m
What is the wrapper for?
I've been using these directly in the OpenLane/OpenRoad flow without any wrapper
m
the wrapper is used to provide extra space for TR to rout to the pins (we used that in a finfet technology to avoid DRC errors)
m
OpenLane has a halo option for that (and most other tools do too)..
And the pins now have clearance on the sides so I don't see that there should be a need for a wrapper
m
sounds good. I had synthesis issues in my design using the yosys version of openlane so I had to switch back to my flow