Paweł Sitarz
10/21/2021, 6:30 PMContents of circuit 1: Circuit: 'user_project_wrapper'
Class: wb_openram_wrapper instances: 1
Circuit contains 229 nets, and 537 disconnected pins.
Circuit 1 contains 2 devices, Circuit 2 contains 2 devices.
Circuit 1 contains 227 nets, Circuit 2 contains 227 nets.
Netlists match uniquely.
Result: Circuits match uniquely.
Logging to file "/project/openlane/user_project_wrapper/runs/user_project_wrapper/results/lvs/user_project_wrapper.lvs.lef.log" disabled
LVS Done.
LVS reports no net, device, pin, or property mismatches.
[INFO]: Running Magic DRC...
Loading sky130A Device Generator Menu ...
[INFO]: Loading user_project_wrapper
Loading DRC CIF style.
No errors found.
[INFO]: COUNT: 0
[INFO]: Should be divided by 3 or 4
[INFO]: DRC Checking DONE (/project/openlane/user_project_wrapper/runs/user_project_wrapper/reports/magic/36-magic.drc)
[INFO ODB-0223] Created 13 technology layers
[INFO ODB-0224] Created 25 technology vias
[INFO ODB-0225] Created 443 library cells
[INFO ODB-0226] Finished LEF file: /project/openlane/user_project_wrapper/runs/user_project_wrapper/tmp/merged_unpadded.lef
[WARNING ORD-0033] -order_wires is deprecated.
[INFO ODB-0127] Reading DEF file: /project/openlane/user_project_wrapper/runs/user_project_wrapper/results/routing/23-user_project_wrapper.def
[INFO ODB-0128] Design: user_project_wrapper
[INFO ODB-0134] Finished DEF file: /project/openlane/user_project_wrapper/runs/user_project_wrapper/results/routing/23-user_project_wrapper.def
[INFO ANT-0001] Found 0 pin violations.
[INFO ANT-0002] Found 0 net violations in 716 nets.
[INFO]: current step index: 38
[INFO]: Your design contains macros, which is not supported by the current integration of CVC. So CVC won't run, however CVC is just a check so it's not critical to your design.
[INFO]: Saving Magic Views in /project
[INFO]: Calculating Runtime From the Start...
[INFO]: flow completed for user_project_wrapper/21-10_18-15 in 0h3m17s
[INFO]: Saving Runtime Environment
[INFO]: Generating Final Summary Report...
[INFO]: Design Name: user_project_wrapper
Run Directory: /project/openlane/user_project_wrapper/runs/user_project_wrapper
----------------------------------------
Magic DRC Summary:
Source: /project/openlane/user_project_wrapper/runs/user_project_wrapper/reports/magic/36-magic.drc
Total Magic DRC violations is 0
----------------------------------------
LVS Summary:
Source: /project/openlane/user_project_wrapper/runs/user_project_wrapper/results/lvs/user_project_wrapper.lvs_parsed.lef.log
LVS reports no net, device, pin, or property mismatches.
Total errors = 0
----------------------------------------
Antenna Summary:
Source: /project/openlane/user_project_wrapper/runs/user_project_wrapper/reports/routing/38-antenna.rpt
Number of pins violated: 0
Number of nets violated: 0
[INFO]: check full report here: /project/openlane/user_project_wrapper/runs/user_project_wrapper/reports/final_summary_report.csv
[SUCCESS]: Flow Completed Without Fatal Errors.
But I'm not 100% sure everything is in tact...Paweł Sitarz
10/21/2021, 6:33 PMMatt Venn
10/21/2021, 7:28 PMPaweł Sitarz
10/22/2021, 4:42 PMPaweł Sitarz
10/22/2021, 4:43 PMMatt Venn
10/22/2021, 4:44 PMPaweł Sitarz
10/22/2021, 4:45 PMPaweł Sitarz
10/22/2021, 4:45 PMTim Edwards
11/01/2021, 2:08 PMPaweł Sitarz
11/02/2021, 8:41 PMTim Edwards
11/03/2021, 2:30 AM