5-GHz 32-bit integer execution core in 130-nm dual-V/sub T/ CMOS https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=1046084 130 nm, six-metal, dual- CMOS technology The 2.3 mm2 prototype contains 160 K transistors Die Area - 1.61 x 1.44 mm At 5 GHz, ALU power is 95 mW at 0.95 V, and The register file consumes 172 mW at 1.37 V. The ALU performance is scalable @ 25 C; 6.5 GHz at 1.1V 10 GHz at 1.7 V

hmmm i wonder what would happen to the freq if you massively parallelized or widened those ALUs so they more resemble a vector arch or just operate on huge vector regs independently with smart-ish pipelining to make sure the correct bits are populated in the regs