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And if so ... wouldn't it make sense to just integrate that diode directly in the cells themselves and not worry about it ?

my understanding from the talk was that fake diodes are put next to all the cells, and then only the ones that cause DRC fails are converted to real diodes

<@U0172QZ342D> Yeah, that got answered in the comments of the talk. My question was that they were always added and were always taking up space they just ended either as diode or filler cell ... and if they were taking space anyway, why not just have them all the time for all cells pre-routed.

And the answer is that the diodes increase the node capacitance so they're left out if not needed.

They still ended up taking space and so the design is maybe not as compact as it could be but it's a trade off to make things easier to deal with.

I didn't see so many in the results from qflow

On a vex design : `Class: sky130_fd_sc_hd__diode_2 instances: 168771`