@User Do we have a DRAM DDR3/DDR4 controller in any shape or form available which we could port to sky130? Then we could build a multi core RISC-V CPU capable of booting a Linux

I haven't researched yet. Infact, that's where we were moving in 40 days from now, when our team will be brain-storming on this. I think the starting point to find open-source cores will be opencores.org

We need an analog component, same goes for PCIe

Oh ok PHY - Not yet But, it's in our charter. Looking for a good team to build this on sky130. It involves a bit of work, as it's about 200+ pages of JEDEC specs

I'm aware of that, that's why I'm asking whether there's already an implementation 🙂